////////////////////////////////////////////////////////////////////////////////
// Copyright (c) 1995-2011 Xilinx, Inc.  All rights reserved.
////////////////////////////////////////////////////////////////////////////////
//   ____  ____
//  /   /\/   /
// /___/  \  /    Vendor: Xilinx
// \   \   \/     Version: O.61xd
//  \   \         Application: netgen
//  /   /         Filename: MemorySampleTest_timesim.v
// /___/   /\     Timestamp: Wed Sep 26 13:53:16 2012
// \   \  /  \ 
//  \___\/\___\
//             
// Command	: -intstyle ise -s 5 -pcf MemorySampleTest.pcf -sdf_anno true -sdf_path netgen/par -insert_glbl true -insert_pp_buffers true -w -dir netgen/par -ofmt verilog -sim MemorySampleTest.ncd MemorySampleTest_timesim.v 
// Device	: 3s50pq208-5 (PRODUCTION 1.39 2011-06-20)
// Input file	: MemorySampleTest.ncd
// Output file	: C:\Users\SergioGQ\Desktop\MemorySampleTest-v.4 - copia\MemorySampleTest\netgen\par\MemorySampleTest_timesim.v
// # of Modules	: 1
// Design Name	: MemorySampleTest
// Xilinx        : C:\Xilinx\13.2\ISE_DS\ISE\
//             
// Purpose:    
//     This verilog netlist is a verification model and uses simulation 
//     primitives which may not represent the true implementation of the 
//     device, however the netlist is functionally correct and should not 
//     be modified. This file cannot be synthesized and should only be used 
//     with supported simulation tools.
//             
// Reference:  
//     Command Line Tools User Guide, Chapter 23 and Synthesis and Simulation Design Guide, Chapter 6
//             
////////////////////////////////////////////////////////////////////////////////

`timescale 1 ns/1 ps

module MemorySampleTest (
  rst_i, segment2_o, write_enable_o, output_enable_o, write_o, clk_i, read_o, data_io, address_o, segment1_o, value_write_i
);
  input rst_i;
  output segment2_o;
  output write_enable_o;
  output output_enable_o;
  output write_o;
  input clk_i;
  output read_o;
  inout [7 : 0] data_io;
  output [3 : 0] address_o;
  output [3 : 0] segment1_o;
  input [1 : 0] value_write_i;
  wire N54;
  wire N49;
  wire clk_i_BUFGP;
  wire \memory/_and0000_0 ;
  wire \memory/_varindex0000<0>_0 ;
  wire \memory/_varindex0000<5>_0 ;
  wire N53;
  wire N48;
  wire \memory/_varindex0000<1>_0 ;
  wire \memory/_varindex0000<6>_0 ;
  wire N52;
  wire N47;
  wire \memory/_varindex0000<2>_0 ;
  wire \memory/_varindex0000<7>_0 ;
  wire \fsm/write_enable_o_931 ;
  wire \fsm/output_enable_o_932 ;
  wire N10_0;
  wire N5_0;
  wire rst_i_IBUF_942;
  wire \fsm/state_mux0000<3>21_0 ;
  wire \fsm/state_mux0000<2>11_0 ;
  wire N51;
  wire N36;
  wire \fsm/address_o_3_1_949 ;
  wire \fsm/address_o_2_1_950 ;
  wire N65_0;
  wire N63_0;
  wire \divider/hz_enable_clk_o_953 ;
  wire N22;
  wire N24_0;
  wire value_write_i_0_IBUF_957;
  wire value_write_i_1_IBUF_959;
  wire \fsm/state_mux0000<2>2107_0 ;
  wire \fsm/state_mux0000<2>226_0 ;
  wire \conterWR/time_ended_o_964 ;
  wire N70_0;
  wire \fsm/state_mux0000<2>0_0 ;
  wire \memory/_varindex0000<4>_0 ;
  wire N50;
  wire \fsm/segment1_o_mux0000<3>35_970 ;
  wire N26_0;
  wire N12_0;
  wire \divider/Mcount_counter_cy[1] ;
  wire \divider/Mcount_counter_cy[3] ;
  wire \divider/Mcount_counter_cy[5] ;
  wire \divider/Mcount_counter_cy[7] ;
  wire \divider/Mcount_counter_cy[9] ;
  wire \divider/Mcount_counter_cy[11] ;
  wire \divider/Mcount_counter_cy[13] ;
  wire \divider/Mcount_counter_cy[15] ;
  wire \divider/Mcount_counter_cy[17] ;
  wire \divider/Mcount_counter_cy[19] ;
  wire \divider/counter_cmp_eq0000 ;
  wire \fsm/segment2_o_1040 ;
  wire \fsm/write_o_1041 ;
  wire \fsm/read_o_1044 ;
  wire \fsm/segment1_o_cmp_gt0000_0 ;
  wire \memory/_varindex0000<3>_0 ;
  wire \fsm/state_mux0000<2>259 ;
  wire \fsm/write_read_o_1054 ;
  wire \fsm/address_o_mux0000<0>_SW0/O ;
  wire N4;
  wire N9;
  wire \fsm/state_mux0000<1>_SW0/O ;
  wire \fsm/state_cmp_eq0013 ;
  wire N11;
  wire \fsm/segment1_o_mux0000<1>2_SW0/O ;
  wire N23;
  wire \fsm/Madd_address_o_share0000_cy<1>11/O ;
  wire \fsm/state_mux0000<3>7_0 ;
  wire \fsm/state_mux0000<3>18/O ;
  wire N18_0;
  wire \fsm/state_mux0000<5>2_0 ;
  wire \fsm/state_mux0000<2>2144/O ;
  wire N7_0;
  wire \memory/_varindex0000<0>/DIF_MUX_1115 ;
  wire \memory/_varindex0000<0>/DIG_MUX_1099 ;
  wire \memory/_varindex0000<0>/CLKINV_1097 ;
  wire \memory/_varindex0000<0>/SRINV_1091 ;
  wire \memory/_varindex0000<1>/DIF_MUX_1168 ;
  wire \memory/_varindex0000<1>/DIG_MUX_1152 ;
  wire \memory/_varindex0000<1>/CLKINV_1150 ;
  wire \memory/_varindex0000<1>/SRINV_1144 ;
  wire \memory/_varindex0000<2>/DIF_MUX_1221 ;
  wire \memory/_varindex0000<2>/DIG_MUX_1205 ;
  wire \memory/_varindex0000<2>/CLKINV_1203 ;
  wire \memory/_varindex0000<2>/SRINV_1197 ;
  wire \fsm/address_o<3>/DXMUX_1248 ;
  wire \fsm/address_o<3>/DYMUX_1243 ;
  wire \fsm/address_o<3>/CLKINV_1241 ;
  wire N10;
  wire \data_io<5>_MLTSRCEDGE ;
  wire N261;
  wire \fsm/segment1_o_mux0000<3>2_1289 ;
  wire \fsm/state_mux0000<3>21_1321 ;
  wire \fsm/state_mux0000<2>11_1312 ;
  wire N65;
  wire N63;
  wire N24;
  wire N22_pack_1;
  wire \fsm/data_to_write<2>/DXMUX_1396 ;
  wire \fsm/data_to_write<2>/DYMUX_1390 ;
  wire \fsm/Mrom_data_to_write_mux00001 ;
  wire \fsm/data_to_write<2>/CLKINV_1380 ;
  wire \fsm/data_to_write<2>/CEINV_1379 ;
  wire \fsm/state_mux0000<2>2107_1422 ;
  wire \fsm/state_mux0000<2>226_1415 ;
  wire N70;
  wire \fsm/state_mux0000<2>0 ;
  wire \memory/_and0000 ;
  wire \data_io<4>_MLTSRCEDGE ;
  wire \fsm/segment1_o<3>/DXMUX_1501 ;
  wire \fsm/segment1_o_mux0000<3>48 ;
  wire \fsm/segment1_o_mux0000<3>35_pack_1 ;
  wire \fsm/segment1_o<3>/SRINV_1486 ;
  wire \fsm/segment1_o<3>/CLKINV_1485 ;
  wire \data_io<6>_MLTSRCEDGE ;
  wire N26;
  wire \fsm/data_to_write_not0001 ;
  wire N12;
  wire \Result<0>/XORF_1588 ;
  wire \Result<0>/LOGIC_ONE_1587 ;
  wire \Result<0>/CYINIT_1586 ;
  wire \Result<0>/CYSELF_1577 ;
  wire \Result<0>/BXINV_1575 ;
  wire \Result<0>/XORG_1573 ;
  wire \Result<0>/CYMUXG_1572 ;
  wire \divider/Mcount_counter_cy[0] ;
  wire \Result<0>/LOGIC_ZERO_1570 ;
  wire \Result<0>/CYSELG_1561 ;
  wire \Result<0>/G ;
  wire \Result<2>/XORF_1626 ;
  wire \Result<2>/CYINIT_1625 ;
  wire \Result<2>/F ;
  wire \Result<2>/XORG_1614 ;
  wire \divider/Mcount_counter_cy[2] ;
  wire \Result<2>/CYSELF_1612 ;
  wire \Result<2>/CYMUXFAST_1611 ;
  wire \Result<2>/CYAND_1610 ;
  wire \Result<2>/FASTCARRY_1609 ;
  wire \Result<2>/CYMUXG2_1608 ;
  wire \Result<2>/CYMUXF2_1607 ;
  wire \Result<2>/LOGIC_ZERO_1606 ;
  wire \Result<2>/CYSELG_1597 ;
  wire \Result<2>/G ;
  wire \Result<4>/XORF_1664 ;
  wire \Result<4>/CYINIT_1663 ;
  wire \Result<4>/F ;
  wire \Result<4>/XORG_1652 ;
  wire \divider/Mcount_counter_cy[4] ;
  wire \Result<4>/CYSELF_1650 ;
  wire \Result<4>/CYMUXFAST_1649 ;
  wire \Result<4>/CYAND_1648 ;
  wire \Result<4>/FASTCARRY_1647 ;
  wire \Result<4>/CYMUXG2_1646 ;
  wire \Result<4>/CYMUXF2_1645 ;
  wire \Result<4>/LOGIC_ZERO_1644 ;
  wire \Result<4>/CYSELG_1635 ;
  wire \Result<4>/G ;
  wire \Result<6>/XORF_1702 ;
  wire \Result<6>/CYINIT_1701 ;
  wire \Result<6>/F ;
  wire \Result<6>/XORG_1690 ;
  wire \divider/Mcount_counter_cy[6] ;
  wire \Result<6>/CYSELF_1688 ;
  wire \Result<6>/CYMUXFAST_1687 ;
  wire \Result<6>/CYAND_1686 ;
  wire \Result<6>/FASTCARRY_1685 ;
  wire \Result<6>/CYMUXG2_1684 ;
  wire \Result<6>/CYMUXF2_1683 ;
  wire \Result<6>/LOGIC_ZERO_1682 ;
  wire \Result<6>/CYSELG_1673 ;
  wire \Result<6>/G ;
  wire \Result<8>/XORF_1740 ;
  wire \Result<8>/CYINIT_1739 ;
  wire \Result<8>/F ;
  wire \Result<8>/XORG_1728 ;
  wire \divider/Mcount_counter_cy[8] ;
  wire \Result<8>/CYSELF_1726 ;
  wire \Result<8>/CYMUXFAST_1725 ;
  wire \Result<8>/CYAND_1724 ;
  wire \Result<8>/FASTCARRY_1723 ;
  wire \Result<8>/CYMUXG2_1722 ;
  wire \Result<8>/CYMUXF2_1721 ;
  wire \Result<8>/LOGIC_ZERO_1720 ;
  wire \Result<8>/CYSELG_1711 ;
  wire \Result<8>/G ;
  wire \Result<10>/XORF_1778 ;
  wire \Result<10>/CYINIT_1777 ;
  wire \Result<10>/F ;
  wire \Result<10>/XORG_1766 ;
  wire \divider/Mcount_counter_cy[10] ;
  wire \Result<10>/CYSELF_1764 ;
  wire \Result<10>/CYMUXFAST_1763 ;
  wire \Result<10>/CYAND_1762 ;
  wire \Result<10>/FASTCARRY_1761 ;
  wire \Result<10>/CYMUXG2_1760 ;
  wire \Result<10>/CYMUXF2_1759 ;
  wire \Result<10>/LOGIC_ZERO_1758 ;
  wire \Result<10>/CYSELG_1749 ;
  wire \Result<10>/G ;
  wire \Result<12>/XORF_1816 ;
  wire \Result<12>/CYINIT_1815 ;
  wire \Result<12>/F ;
  wire \Result<12>/XORG_1804 ;
  wire \divider/Mcount_counter_cy[12] ;
  wire \Result<12>/CYSELF_1802 ;
  wire \Result<12>/CYMUXFAST_1801 ;
  wire \Result<12>/CYAND_1800 ;
  wire \Result<12>/FASTCARRY_1799 ;
  wire \Result<12>/CYMUXG2_1798 ;
  wire \Result<12>/CYMUXF2_1797 ;
  wire \Result<12>/LOGIC_ZERO_1796 ;
  wire \Result<12>/CYSELG_1787 ;
  wire \Result<12>/G ;
  wire \Result<14>/XORF_1854 ;
  wire \Result<14>/CYINIT_1853 ;
  wire \Result<14>/F ;
  wire \Result<14>/XORG_1842 ;
  wire \divider/Mcount_counter_cy[14] ;
  wire \Result<14>/CYSELF_1840 ;
  wire \Result<14>/CYMUXFAST_1839 ;
  wire \Result<14>/CYAND_1838 ;
  wire \Result<14>/FASTCARRY_1837 ;
  wire \Result<14>/CYMUXG2_1836 ;
  wire \Result<14>/CYMUXF2_1835 ;
  wire \Result<14>/LOGIC_ZERO_1834 ;
  wire \Result<14>/CYSELG_1825 ;
  wire \Result<14>/G ;
  wire \Result<16>/XORF_1892 ;
  wire \Result<16>/CYINIT_1891 ;
  wire \Result<16>/F ;
  wire \Result<16>/XORG_1880 ;
  wire \divider/Mcount_counter_cy[16] ;
  wire \Result<16>/CYSELF_1878 ;
  wire \Result<16>/CYMUXFAST_1877 ;
  wire \Result<16>/CYAND_1876 ;
  wire \Result<16>/FASTCARRY_1875 ;
  wire \Result<16>/CYMUXG2_1874 ;
  wire \Result<16>/CYMUXF2_1873 ;
  wire \Result<16>/LOGIC_ZERO_1872 ;
  wire \Result<16>/CYSELG_1863 ;
  wire \Result<16>/G ;
  wire \Result<18>/XORF_1930 ;
  wire \Result<18>/CYINIT_1929 ;
  wire \Result<18>/F ;
  wire \Result<18>/XORG_1918 ;
  wire \divider/Mcount_counter_cy[18] ;
  wire \Result<18>/CYSELF_1916 ;
  wire \Result<18>/CYMUXFAST_1915 ;
  wire \Result<18>/CYAND_1914 ;
  wire \Result<18>/FASTCARRY_1913 ;
  wire \Result<18>/CYMUXG2_1912 ;
  wire \Result<18>/CYMUXF2_1911 ;
  wire \Result<18>/LOGIC_ZERO_1910 ;
  wire \Result<18>/CYSELG_1901 ;
  wire \Result<18>/G ;
  wire \Result<20>/XORF_1968 ;
  wire \Result<20>/CYINIT_1967 ;
  wire \Result<20>/F ;
  wire \Result<20>/XORG_1956 ;
  wire \divider/Mcount_counter_cy[20] ;
  wire \Result<20>/CYSELF_1954 ;
  wire \Result<20>/CYMUXFAST_1953 ;
  wire \Result<20>/CYAND_1952 ;
  wire \Result<20>/FASTCARRY_1951 ;
  wire \Result<20>/CYMUXG2_1950 ;
  wire \Result<20>/CYMUXF2_1949 ;
  wire \Result<20>/LOGIC_ZERO_1948 ;
  wire \Result<20>/CYSELG_1939 ;
  wire \Result<20>/G ;
  wire \Result<22>/XORF_1999 ;
  wire \Result<22>/LOGIC_ZERO_1998 ;
  wire \Result<22>/CYINIT_1997 ;
  wire \Result<22>/CYSELF_1988 ;
  wire \Result<22>/F ;
  wire \Result<22>/XORG_1985 ;
  wire \divider/Mcount_counter_cy[22] ;
  wire \divider/counter<23>_rt_1982 ;
  wire \divider/counter_cmp_eq0000_wg_cy<1>/CYINIT_2029 ;
  wire \divider/counter_cmp_eq0000_wg_cy<1>/CYSELF_2023 ;
  wire \divider/counter_cmp_eq0000_wg_cy<1>/BXINV_2021 ;
  wire \divider/counter_cmp_eq0000_wg_cy<1>/CYMUXG_2020 ;
  wire \divider/counter_cmp_eq0000_wg_cy<1>/LOGIC_ZERO_2018 ;
  wire \divider/counter_cmp_eq0000_wg_cy<1>/CYSELG_2012 ;
  wire \divider/counter_cmp_eq0000_wg_cy<3>/CYSELF_2053 ;
  wire \divider/counter_cmp_eq0000_wg_cy<3>/CYMUXFAST_2052 ;
  wire \divider/counter_cmp_eq0000_wg_cy<3>/CYAND_2051 ;
  wire \divider/counter_cmp_eq0000_wg_cy<3>/FASTCARRY_2050 ;
  wire \divider/counter_cmp_eq0000_wg_cy<3>/CYMUXG2_2049 ;
  wire \divider/counter_cmp_eq0000_wg_cy<3>/CYMUXF2_2048 ;
  wire \divider/counter_cmp_eq0000_wg_cy<3>/LOGIC_ZERO_2047 ;
  wire \divider/counter_cmp_eq0000_wg_cy<3>/CYSELG_2041 ;
  wire \divider/counter_cmp_eq0000/CYSELF_2083 ;
  wire \divider/counter_cmp_eq0000/CYMUXFAST_2082 ;
  wire \divider/counter_cmp_eq0000/CYAND_2081 ;
  wire \divider/counter_cmp_eq0000/FASTCARRY_2080 ;
  wire \divider/counter_cmp_eq0000/CYMUXG2_2079 ;
  wire \divider/counter_cmp_eq0000/CYMUXF2_2078 ;
  wire \divider/counter_cmp_eq0000/LOGIC_ZERO_2077 ;
  wire \divider/counter_cmp_eq0000/CYSELG_2071 ;
  wire \segment2_o/O ;
  wire \write_o/O ;
  wire \clk_i/INBUF ;
  wire \value_write_i<0>/INBUF ;
  wire \value_write_i<1>/INBUF ;
  wire \write_enable_o/O ;
  wire \rst_i/INBUF ;
  wire \address_o<0>/O ;
  wire \data_io<0>/O ;
  wire \data_io<0>/T ;
  wire \data_io<0>/INBUF ;
  wire \read_o/O ;
  wire \address_o<1>/O ;
  wire \data_io<1>/O ;
  wire \data_io<1>/T ;
  wire \data_io<1>/INBUF ;
  wire \address_o<2>/O ;
  wire \data_io<2>/O ;
  wire \data_io<2>/T ;
  wire \data_io<2>/INBUF ;
  wire \address_o<3>/O ;
  wire \data_io<3>/O ;
  wire \data_io<3>/T ;
  wire \data_io<3>/INBUF ;
  wire \segment1_o<0>/O ;
  wire \data_io<4>/O ;
  wire \data_io<4>/T ;
  wire \data_io<4>/INBUF ;
  wire \segment1_o<1>/O ;
  wire \output_enable_o/O ;
  wire \data_io<5>/O ;
  wire \data_io<5>/T ;
  wire \data_io<5>/INBUF ;
  wire \segment1_o<2>/O ;
  wire \data_io<6>/O ;
  wire \data_io<6>/T ;
  wire \data_io<6>/INBUF ;
  wire \segment1_o<3>/O ;
  wire \data_io<7>/O ;
  wire \data_io<7>/T ;
  wire \data_io<7>/INBUF ;
  wire \clk_i_BUFGP/BUFG/S_INVNOT ;
  wire \clk_i_BUFGP/BUFG/I0_INV ;
  wire \fsm/segment2_o/DXMUX_2420 ;
  wire \fsm/segment2_o/F5MUX_2418 ;
  wire N73;
  wire \fsm/segment2_o/BXINV_2411 ;
  wire N72;
  wire \fsm/segment2_o/SRINV_2404 ;
  wire \fsm/segment2_o/CLKINV_2403 ;
  wire \data_io<0>_MLTSRCEDGE/F5MUX_2448 ;
  wire \data_io<0>_MLTSRCEDGELogicTrst ;
  wire \data_io<0>_MLTSRCEDGE/BXINV_2440 ;
  wire \data_io<0>_MLTSRCEDGELogicTrst1_2438 ;
  wire \data_io<1>_MLTSRCEDGE/F5MUX_2473 ;
  wire \data_io<1>_MLTSRCEDGELogicTrst ;
  wire \data_io<1>_MLTSRCEDGE/BXINV_2465 ;
  wire \data_io<1>_MLTSRCEDGELogicTrst1_2463 ;
  wire \data_io<2>_MLTSRCEDGE/F5MUX_2498 ;
  wire \data_io<2>_MLTSRCEDGELogicTrst ;
  wire \data_io<2>_MLTSRCEDGE/BXINV_2490 ;
  wire \data_io<2>_MLTSRCEDGELogicTrst1_2488 ;
  wire \data_io<3>_MLTSRCEDGE/F5MUX_2523 ;
  wire \data_io<3>_MLTSRCEDGELogicTrst ;
  wire \data_io<3>_MLTSRCEDGE/BXINV_2515 ;
  wire \data_io<3>_MLTSRCEDGELogicTrst1_2513 ;
  wire \fsm/state_mux0000<2>259/F5MUX_2548 ;
  wire N75;
  wire \fsm/state_mux0000<2>259/BXINV_2541 ;
  wire N74;
  wire \fsm/write_read_o/DXMUX_2579 ;
  wire \fsm/write_read_o/F5MUX_2577 ;
  wire \fsm/write_read_o_mux000011_2575 ;
  wire \fsm/write_read_o/BXINV_2570 ;
  wire \fsm/state<3>_rt_2568 ;
  wire \fsm/write_read_o/SRINV_2560 ;
  wire \fsm/write_read_o/CLKINV_2559 ;
  wire \fsm/address_o_3_1/DXMUX_2611 ;
  wire \fsm/address_o_3_1/FXMUX_2610 ;
  wire \fsm/address_o_mux0000<0>_SW0/O_pack_1 ;
  wire \fsm/address_o_3_1/CLKINV_2595 ;
  wire \fsm/state<5>/DXMUX_2641 ;
  wire \fsm/state_mux0000[1] ;
  wire \fsm/state_mux0000<1>_SW0/O_pack_2 ;
  wire \fsm/state<5>/CLKINV_2624 ;
  wire \fsm/segment1_o<0>/DXMUX_2673 ;
  wire \fsm/segment1_o_mux0000<0>1_2670 ;
  wire N11_pack_2;
  wire \fsm/segment1_o<0>/SRINV_2657 ;
  wire \fsm/segment1_o<0>/CLKINV_2656 ;
  wire N5;
  wire \fsm/segment1_o_mux0000<1>2_SW0/O_pack_1 ;
  wire \fsm/state_mux0000<2>15_2723 ;
  wire N23_pack_1;
  wire \fsm/address_o_2_1/DXMUX_2753 ;
  wire \fsm/address_o_2_1/FXMUX_2752 ;
  wire \fsm/Madd_address_o_share0000_cy<1>11/O_pack_1 ;
  wire \fsm/address_o_2_1/CLKINV_2736 ;
  wire \fsm/address_o<1>/DXMUX_2783 ;
  wire N9_pack_2;
  wire \fsm/address_o<1>/CLKINV_2768 ;
  wire \fsm/state<3>/DXMUX_2813 ;
  wire \fsm/state_mux0000[3] ;
  wire \fsm/state_mux0000<3>18/O_pack_1 ;
  wire \fsm/state<3>/CLKINV_2797 ;
  wire \fsm/address_o<0>/DXMUX_2843 ;
  wire N4_pack_2;
  wire \fsm/address_o<0>/CLKINV_2827 ;
  wire \fsm/state_mux0000<5>10_2868 ;
  wire \fsm/state_cmp_eq0013_pack_1 ;
  wire N7;
  wire \fsm/state_mux0000<2>2144/O_pack_1 ;
  wire \fsm/read_o/DXMUX_2928 ;
  wire \fsm/read_o_mux00001_2925 ;
  wire \fsm/read_o/DYMUX_2916 ;
  wire \fsm/output_enable_o_mux00001_2913 ;
  wire \fsm/read_o/SRINV_2908 ;
  wire \fsm/read_o/CLKINV_2907 ;
  wire \conterWR/counter<1>/DXMUX_2971 ;
  wire \conterWR/Mcount_counter1 ;
  wire \conterWR/counter<1>/DYMUX_2954 ;
  wire \conterWR/Mcount_counter ;
  wire \conterWR/counter<1>/SRINV_2944 ;
  wire \conterWR/counter<1>/CLKINV_2943 ;
  wire \conterWR/counter<1>/CEINV_2942 ;
  wire \divider/counter<11>/DXMUX_3017 ;
  wire \divider/Mcount_counter_eqn_11 ;
  wire \divider/counter<11>/DYMUX_3000 ;
  wire \divider/Mcount_counter_eqn_10 ;
  wire \divider/counter<11>/SRINV_2990 ;
  wire \divider/counter<11>/CLKINV_2989 ;
  wire \divider/counter<11>/CEINVNOT ;
  wire \fsm/segment1_o<1>/DYMUX_3041 ;
  wire \fsm/segment1_o_mux0000<1>1_3038 ;
  wire \fsm/segment1_o<1>/SRINV_3032 ;
  wire \fsm/segment1_o<1>/CLKINV_3031 ;
  wire \fsm/segment1_o<2>/DYMUX_3060 ;
  wire \fsm/segment1_o<2>/CLKINV_3052 ;
  wire \divider/counter<21>/DXMUX_3102 ;
  wire \divider/Mcount_counter_eqn_21 ;
  wire \divider/counter<21>/DYMUX_3085 ;
  wire \divider/Mcount_counter_eqn_20 ;
  wire \divider/counter<21>/SRINV_3075 ;
  wire \divider/counter<21>/CLKINV_3074 ;
  wire \divider/counter<21>/CEINVNOT ;
  wire \divider/counter<13>/DXMUX_3148 ;
  wire \divider/Mcount_counter_eqn_13 ;
  wire \divider/counter<13>/DYMUX_3131 ;
  wire \divider/Mcount_counter_eqn_12 ;
  wire \divider/counter<13>/SRINV_3121 ;
  wire \divider/counter<13>/CLKINV_3120 ;
  wire \divider/counter<13>/CEINVNOT ;
  wire \divider/counter<23>/FFX/RST ;
  wire \divider/counter<23>/DXMUX_3194 ;
  wire \divider/Mcount_counter_eqn_23 ;
  wire \divider/counter<23>/DYMUX_3177 ;
  wire \divider/Mcount_counter_eqn_22 ;
  wire \divider/counter<23>/SRINV_3167 ;
  wire \divider/counter<23>/CLKINV_3166 ;
  wire \divider/counter<23>/CEINVNOT ;
  wire \divider/counter<15>/FFY/RST ;
  wire \divider/counter<15>/FFX/RST ;
  wire \divider/counter<15>/DXMUX_3240 ;
  wire \divider/Mcount_counter_eqn_15 ;
  wire \divider/counter<15>/DYMUX_3223 ;
  wire \divider/Mcount_counter_eqn_14 ;
  wire \divider/counter<15>/SRINV_3213 ;
  wire \divider/counter<15>/CLKINV_3212 ;
  wire \divider/counter<15>/CEINVNOT ;
  wire \divider/counter<17>/FFY/RST ;
  wire \divider/counter<17>/FFX/RST ;
  wire \divider/counter<17>/DXMUX_3286 ;
  wire \divider/Mcount_counter_eqn_17 ;
  wire \divider/counter<17>/DYMUX_3269 ;
  wire \divider/Mcount_counter_eqn_16 ;
  wire \divider/counter<17>/SRINV_3259 ;
  wire \divider/counter<17>/CLKINV_3258 ;
  wire \divider/counter<17>/CEINVNOT ;
  wire \fsm/state_mux0000<5>2_3324 ;
  wire \fsm/write_o/DYMUX_3314 ;
  wire \fsm/write_o_mux00001 ;
  wire \fsm/write_o/SRINV_3305 ;
  wire \fsm/write_o/CLKINV_3304 ;
  wire \divider/counter<19>/FFY/RST ;
  wire \divider/counter<19>/FFX/RST ;
  wire \divider/counter<19>/DXMUX_3365 ;
  wire \divider/Mcount_counter_eqn_19 ;
  wire \divider/counter<19>/DYMUX_3348 ;
  wire \divider/Mcount_counter_eqn_18 ;
  wire \divider/counter<19>/SRINV_3338 ;
  wire \divider/counter<19>/CLKINV_3337 ;
  wire \divider/counter<19>/CEINVNOT ;
  wire N18;
  wire \fsm/write_enable_o/DYMUX_3393 ;
  wire \fsm/write_enable_o_mux00001_3390 ;
  wire \fsm/write_enable_o/SRINV_3385 ;
  wire \fsm/write_enable_o/CLKINV_3384 ;
  wire \divider/counter<1>/FFX/RST ;
  wire \divider/counter<1>/FFY/RST ;
  wire \divider/counter<1>/DXMUX_3444 ;
  wire \divider/Mcount_counter_eqn_1 ;
  wire \divider/counter<1>/DYMUX_3427 ;
  wire \divider/Mcount_counter_eqn_0 ;
  wire \divider/counter<1>/SRINV_3417 ;
  wire \divider/counter<1>/CLKINV_3416 ;
  wire \divider/counter<1>/CEINVNOT ;
  wire \divider/counter<3>/FFY/RST ;
  wire \divider/counter<3>/FFX/RST ;
  wire \divider/counter<3>/DXMUX_3490 ;
  wire \divider/Mcount_counter_eqn_3 ;
  wire \divider/counter<3>/DYMUX_3473 ;
  wire \divider/Mcount_counter_eqn_2 ;
  wire \divider/counter<3>/SRINV_3463 ;
  wire \divider/counter<3>/CLKINV_3462 ;
  wire \divider/counter<3>/CEINVNOT ;
  wire \divider/counter<5>/FFY/RST ;
  wire \divider/counter<5>/FFX/RST ;
  wire \divider/counter<5>/DXMUX_3536 ;
  wire \divider/Mcount_counter_eqn_5 ;
  wire \divider/counter<5>/DYMUX_3519 ;
  wire \divider/Mcount_counter_eqn_4 ;
  wire \divider/counter<5>/SRINV_3509 ;
  wire \divider/counter<5>/CLKINV_3508 ;
  wire \divider/counter<5>/CEINVNOT ;
  wire \divider/counter<7>/FFY/RST ;
  wire \divider/counter<7>/FFX/RST ;
  wire \divider/counter<7>/DXMUX_3582 ;
  wire \divider/Mcount_counter_eqn_7 ;
  wire \divider/counter<7>/DYMUX_3565 ;
  wire \divider/Mcount_counter_eqn_6 ;
  wire \divider/counter<7>/SRINV_3555 ;
  wire \divider/counter<7>/CLKINV_3554 ;
  wire \divider/counter<7>/CEINVNOT ;
  wire \divider/counter<9>/FFY/RST ;
  wire \divider/counter<9>/FFX/RST ;
  wire \divider/counter<9>/DXMUX_3628 ;
  wire \divider/Mcount_counter_eqn_9 ;
  wire \divider/counter<9>/DYMUX_3611 ;
  wire \divider/Mcount_counter_eqn_8 ;
  wire \divider/counter<9>/SRINV_3601 ;
  wire \divider/counter<9>/CLKINV_3600 ;
  wire \divider/counter<9>/CEINVNOT ;
  wire \conterWR/counter_not0001 ;
  wire \fsm/state<0>/DYMUX_3657 ;
  wire \fsm/state_mux0000<6>1_3654 ;
  wire \fsm/state<0>/CLKINV_3649 ;
  wire \fsm/state<0>/CEINV_3648 ;
  wire \fsm/state<1>/DYMUX_3685 ;
  wire \fsm/state_mux0000<5>28 ;
  wire \fsm/state<1>/SRINV_3677 ;
  wire \fsm/state<1>/CLKINV_3676 ;
  wire \fsm/state<2>/DYMUX_3704 ;
  wire \fsm/state_mux0000[4] ;
  wire \fsm/state<2>/CLKINV_3696 ;
  wire \fsm/state<4>/DYMUX_3724 ;
  wire \fsm/state_mux0000<2>19 ;
  wire \fsm/state<4>/SRINV_3715 ;
  wire \fsm/state<4>/CLKINV_3714 ;
  wire \fsm/state<6>/DYMUX_3743 ;
  wire \fsm/state_mux0000[0] ;
  wire \fsm/state<6>/CLKINV_3735 ;
  wire \data_io<7>_MLTSRCEDGE ;
  wire \fsm/state_mux0000<3>7_3768 ;
  wire \conterWR/time_ended_o_not0001 ;
  wire \divider/hz_enable_clk_o_not0001 ;
  wire \conterWR/time_ended_o/FFY/RST ;
  wire \conterWR/time_ended_o/DYMUX_3804 ;
  wire \conterWR/time_ended_o/CLKINV_3801 ;
  wire \conterWR/time_ended_o/CEINV_3800 ;
  wire \divider/hz_enable_clk_o/FFY/RST ;
  wire \divider/hz_enable_clk_o/DYMUX_3821 ;
  wire \divider/hz_enable_clk_o/CLKINV_3818 ;
  wire \divider/hz_enable_clk_o/CEINV_3817 ;
  wire \fsm/segment1_o_cmp_gt0000 ;
  wire N36_pack_1;
  wire \memory/_varindex0000<4>/DIF_MUX_3891 ;
  wire \memory/_varindex0000<4>/DIG_MUX_3875 ;
  wire \memory/_varindex0000<4>/CLKINV_3873 ;
  wire \memory/_varindex0000<4>/SRINV_3867 ;
  wire \NlwBufferSignal_memory/Mram_memory4/RADR1 ;
  wire \NlwBufferSignal_memory/Mram_memory4/RADR2 ;
  wire \NlwBufferSignal_memory/Mram_memory4/RADR3 ;
  wire \NlwBufferSignal_memory/Mram_memory4/RADR4 ;
  wire \NlwBufferSignal_memory/Mram_memory4/WADR1 ;
  wire \NlwBufferSignal_memory/Mram_memory4/WADR2 ;
  wire \NlwBufferSignal_memory/Mram_memory4/WADR3 ;
  wire \NlwBufferSignal_memory/Mram_memory4/WADR4 ;
  wire \NlwBufferSignal_memory/Mram_memory5/RADR1 ;
  wire \NlwBufferSignal_memory/Mram_memory5/RADR2 ;
  wire \NlwBufferSignal_memory/Mram_memory5/RADR3 ;
  wire \NlwBufferSignal_memory/Mram_memory5/RADR4 ;
  wire \NlwBufferSignal_memory/Mram_memory5/WADR1 ;
  wire \NlwBufferSignal_memory/Mram_memory5/WADR2 ;
  wire \NlwBufferSignal_memory/Mram_memory5/WADR3 ;
  wire \NlwBufferSignal_memory/Mram_memory5/WADR4 ;
  wire \NlwBufferSignal_memory/Mram_memory6/RADR1 ;
  wire \NlwBufferSignal_memory/Mram_memory6/RADR2 ;
  wire \NlwBufferSignal_memory/Mram_memory6/RADR4 ;
  wire \NlwBufferSignal_memory/Mram_memory6/WADR1 ;
  wire \NlwBufferSignal_memory/Mram_memory6/WADR2 ;
  wire \NlwBufferSignal_memory/Mram_memory6/WADR4 ;
  wire \NlwBufferSignal_memory/Mram_memory1/RADR1 ;
  wire \NlwBufferSignal_memory/Mram_memory1/RADR2 ;
  wire \NlwBufferSignal_memory/Mram_memory1/RADR4 ;
  wire \NlwBufferSignal_memory/Mram_memory1/WADR1 ;
  wire \NlwBufferSignal_memory/Mram_memory1/WADR2 ;
  wire \NlwBufferSignal_memory/Mram_memory1/WADR4 ;
  wire \NlwBufferSignal_memory/Mram_memory7/RADR1 ;
  wire \NlwBufferSignal_memory/Mram_memory7/RADR2 ;
  wire \NlwBufferSignal_memory/Mram_memory7/RADR3 ;
  wire \NlwBufferSignal_memory/Mram_memory7/RADR4 ;
  wire \NlwBufferSignal_memory/Mram_memory7/WADR1 ;
  wire \NlwBufferSignal_memory/Mram_memory7/WADR2 ;
  wire \NlwBufferSignal_memory/Mram_memory7/WADR3 ;
  wire \NlwBufferSignal_memory/Mram_memory7/WADR4 ;
  wire \NlwBufferSignal_memory/Mram_memory2/RADR1 ;
  wire \NlwBufferSignal_memory/Mram_memory2/RADR2 ;
  wire \NlwBufferSignal_memory/Mram_memory2/RADR3 ;
  wire \NlwBufferSignal_memory/Mram_memory2/RADR4 ;
  wire \NlwBufferSignal_memory/Mram_memory2/WADR1 ;
  wire \NlwBufferSignal_memory/Mram_memory2/WADR2 ;
  wire \NlwBufferSignal_memory/Mram_memory2/WADR3 ;
  wire \NlwBufferSignal_memory/Mram_memory2/WADR4 ;
  wire \NlwBufferSignal_memory/Mram_memory8/RADR1 ;
  wire \NlwBufferSignal_memory/Mram_memory8/RADR2 ;
  wire \NlwBufferSignal_memory/Mram_memory8/RADR3 ;
  wire \NlwBufferSignal_memory/Mram_memory8/RADR4 ;
  wire \NlwBufferSignal_memory/Mram_memory8/WADR1 ;
  wire \NlwBufferSignal_memory/Mram_memory8/WADR2 ;
  wire \NlwBufferSignal_memory/Mram_memory8/WADR3 ;
  wire \NlwBufferSignal_memory/Mram_memory8/WADR4 ;
  wire \NlwBufferSignal_memory/Mram_memory3/RADR1 ;
  wire \NlwBufferSignal_memory/Mram_memory3/RADR2 ;
  wire \NlwBufferSignal_memory/Mram_memory3/RADR3 ;
  wire \NlwBufferSignal_memory/Mram_memory3/RADR4 ;
  wire \NlwBufferSignal_memory/Mram_memory3/WADR1 ;
  wire \NlwBufferSignal_memory/Mram_memory3/WADR2 ;
  wire \NlwBufferSignal_memory/Mram_memory3/WADR3 ;
  wire \NlwBufferSignal_memory/Mram_memory3/WADR4 ;
  wire GND;
  wire VCC;
  wire [3 : 0] \fsm/address_o ;
  wire [3 : 0] \fsm/segment1_o ;
  wire [6 : 0] \fsm/state ;
  wire [3 : 2] \fsm/data_to_write ;
  wire [23 : 0] \divider/counter ;
  wire [23 : 0] Result;
  wire [1 : 0] \conterWR/counter ;
  wire [7 : 0] \memory/_varindex0000 ;
  wire [0 : 0] \divider/Mcount_counter_lut ;
  wire [5 : 0] \divider/counter_cmp_eq0000_wg_lut ;
  wire [0 : 0] \divider/counter_cmp_eq0000_wg_cy ;
  wire [3 : 0] \fsm/address_o_mux0000 ;
  wire [2 : 2] \fsm/segment1_o_mux0000 ;
  initial $sdf_annotate("netgen/par/memorysampletest_timesim.sdf");
  X_BUF #(
    .LOC ( "SLICE_X18Y28" ))
  \memory/_varindex0000<0>/XUSED  (
    .I(\memory/_varindex0000 [0]),
    .O(\memory/_varindex0000<0>_0 )
  );
  X_BUF #(
    .LOC ( "SLICE_X18Y28" ))
  \memory/_varindex0000<0>/DIF_MUX  (
    .I(N54),
    .O(\memory/_varindex0000<0>/DIF_MUX_1115 )
  );
  X_BUF #(
    .LOC ( "SLICE_X18Y28" ))
  \memory/_varindex0000<0>/YUSED  (
    .I(\memory/_varindex0000 [5]),
    .O(\memory/_varindex0000<5>_0 )
  );
  X_BUF #(
    .LOC ( "SLICE_X18Y28" ))
  \memory/_varindex0000<0>/DIG_MUX  (
    .I(N49),
    .O(\memory/_varindex0000<0>/DIG_MUX_1099 )
  );
  X_BUF #(
    .LOC ( "SLICE_X18Y28" ))
  \memory/_varindex0000<0>/SRINV  (
    .I(\memory/_and0000_0 ),
    .O(\memory/_varindex0000<0>/SRINV_1091 )
  );
  X_BUF #(
    .LOC ( "SLICE_X18Y28" ))
  \memory/_varindex0000<0>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\memory/_varindex0000<0>/CLKINV_1097 )
  );
  X_BUF #(
    .LOC ( "SLICE_X20Y30" ))
  \memory/_varindex0000<1>/XUSED  (
    .I(\memory/_varindex0000 [1]),
    .O(\memory/_varindex0000<1>_0 )
  );
  X_BUF #(
    .LOC ( "SLICE_X20Y30" ))
  \memory/_varindex0000<1>/DIF_MUX  (
    .I(N53),
    .O(\memory/_varindex0000<1>/DIF_MUX_1168 )
  );
  X_BUF #(
    .LOC ( "SLICE_X20Y30" ))
  \memory/_varindex0000<1>/YUSED  (
    .I(\memory/_varindex0000 [6]),
    .O(\memory/_varindex0000<6>_0 )
  );
  X_BUF #(
    .LOC ( "SLICE_X20Y30" ))
  \memory/_varindex0000<1>/DIG_MUX  (
    .I(N48),
    .O(\memory/_varindex0000<1>/DIG_MUX_1152 )
  );
  X_BUF #(
    .LOC ( "SLICE_X20Y30" ))
  \memory/_varindex0000<1>/SRINV  (
    .I(\memory/_and0000_0 ),
    .O(\memory/_varindex0000<1>/SRINV_1144 )
  );
  X_BUF #(
    .LOC ( "SLICE_X20Y30" ))
  \memory/_varindex0000<1>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\memory/_varindex0000<1>/CLKINV_1150 )
  );
  X_BUF #(
    .LOC ( "SLICE_X20Y31" ))
  \memory/_varindex0000<2>/XUSED  (
    .I(\memory/_varindex0000 [2]),
    .O(\memory/_varindex0000<2>_0 )
  );
  X_BUF #(
    .LOC ( "SLICE_X20Y31" ))
  \memory/_varindex0000<2>/DIF_MUX  (
    .I(N52),
    .O(\memory/_varindex0000<2>/DIF_MUX_1221 )
  );
  X_BUF #(
    .LOC ( "SLICE_X20Y31" ))
  \memory/_varindex0000<2>/YUSED  (
    .I(\memory/_varindex0000 [7]),
    .O(\memory/_varindex0000<7>_0 )
  );
  X_BUF #(
    .LOC ( "SLICE_X20Y31" ))
  \memory/_varindex0000<2>/DIG_MUX  (
    .I(N47),
    .O(\memory/_varindex0000<2>/DIG_MUX_1205 )
  );
  X_BUF #(
    .LOC ( "SLICE_X20Y31" ))
  \memory/_varindex0000<2>/SRINV  (
    .I(\memory/_and0000_0 ),
    .O(\memory/_varindex0000<2>/SRINV_1197 )
  );
  X_BUF #(
    .LOC ( "SLICE_X20Y31" ))
  \memory/_varindex0000<2>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\memory/_varindex0000<2>/CLKINV_1203 )
  );
  X_BUF #(
    .LOC ( "SLICE_X19Y26" ))
  \fsm/address_o<3>/DXMUX  (
    .I(\fsm/address_o_3_1/FXMUX_2610 ),
    .O(\fsm/address_o<3>/DXMUX_1248 )
  );
  X_BUF #(
    .LOC ( "SLICE_X19Y26" ))
  \fsm/address_o<3>/DYMUX  (
    .I(\fsm/address_o_2_1/FXMUX_2752 ),
    .O(\fsm/address_o<3>/DYMUX_1243 )
  );
  X_BUF #(
    .LOC ( "SLICE_X19Y26" ))
  \fsm/address_o<3>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\fsm/address_o<3>/CLKINV_1241 )
  );
  X_BUF #(
    .LOC ( "SLICE_X19Y28" ))
  \N10/XUSED  (
    .I(N10),
    .O(N10_0)
  );
  X_BUF #(
    .LOC ( "SLICE_X15Y26" ))
  \fsm/state_mux0000<3>21/XUSED  (
    .I(\fsm/state_mux0000<3>21_1321 ),
    .O(\fsm/state_mux0000<3>21_0 )
  );
  X_BUF #(
    .LOC ( "SLICE_X15Y26" ))
  \fsm/state_mux0000<3>21/YUSED  (
    .I(\fsm/state_mux0000<2>11_1312 ),
    .O(\fsm/state_mux0000<2>11_0 )
  );
  X_BUF #(
    .LOC ( "SLICE_X19Y29" ))
  \N65/XUSED  (
    .I(N65),
    .O(N65_0)
  );
  X_BUF #(
    .LOC ( "SLICE_X19Y29" ))
  \N65/YUSED  (
    .I(N63),
    .O(N63_0)
  );
  X_BUF #(
    .LOC ( "SLICE_X14Y29" ))
  \N24/XUSED  (
    .I(N24),
    .O(N24_0)
  );
  X_BUF #(
    .LOC ( "SLICE_X14Y29" ))
  \N24/YUSED  (
    .I(N22_pack_1),
    .O(N22)
  );
  X_INV #(
    .LOC ( "SLICE_X16Y30" ))
  \fsm/data_to_write<2>/DXMUX  (
    .I(value_write_i_0_IBUF_957),
    .O(\fsm/data_to_write<2>/DXMUX_1396 )
  );
  X_BUF #(
    .LOC ( "SLICE_X16Y30" ))
  \fsm/data_to_write<2>/DYMUX  (
    .I(\fsm/Mrom_data_to_write_mux00001 ),
    .O(\fsm/data_to_write<2>/DYMUX_1390 )
  );
  X_BUF #(
    .LOC ( "SLICE_X16Y30" ))
  \fsm/data_to_write<2>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\fsm/data_to_write<2>/CLKINV_1380 )
  );
  X_BUF #(
    .LOC ( "SLICE_X16Y30" ))
  \fsm/data_to_write<2>/CEINV  (
    .I(\fsm/data_to_write_not0001 ),
    .O(\fsm/data_to_write<2>/CEINV_1379 )
  );
  X_BUF #(
    .LOC ( "SLICE_X16Y29" ))
  \fsm/state_mux0000<2>2107/XUSED  (
    .I(\fsm/state_mux0000<2>2107_1422 ),
    .O(\fsm/state_mux0000<2>2107_0 )
  );
  X_BUF #(
    .LOC ( "SLICE_X16Y29" ))
  \fsm/state_mux0000<2>2107/YUSED  (
    .I(\fsm/state_mux0000<2>226_1415 ),
    .O(\fsm/state_mux0000<2>226_0 )
  );
  X_BUF #(
    .LOC ( "SLICE_X14Y24" ))
  \N70/XUSED  (
    .I(N70),
    .O(N70_0)
  );
  X_BUF #(
    .LOC ( "SLICE_X14Y24" ))
  \N70/YUSED  (
    .I(\fsm/state_mux0000<2>0 ),
    .O(\fsm/state_mux0000<2>0_0 )
  );
  X_BUF #(
    .LOC ( "SLICE_X19Y31" ))
  \memory/_and0000/XUSED  (
    .I(\memory/_and0000 ),
    .O(\memory/_and0000_0 )
  );
  X_BUF #(
    .LOC ( "SLICE_X14Y28" ))
  \fsm/segment1_o<3>/DXMUX  (
    .I(\fsm/segment1_o_mux0000<3>48 ),
    .O(\fsm/segment1_o<3>/DXMUX_1501 )
  );
  X_BUF #(
    .LOC ( "SLICE_X14Y28" ))
  \fsm/segment1_o<3>/YUSED  (
    .I(\fsm/segment1_o_mux0000<3>35_pack_1 ),
    .O(\fsm/segment1_o_mux0000<3>35_970 )
  );
  X_BUF #(
    .LOC ( "SLICE_X14Y28" ))
  \fsm/segment1_o<3>/SRINV  (
    .I(\fsm/segment1_o_mux0000<3>2_1289 ),
    .O(\fsm/segment1_o<3>/SRINV_1486 )
  );
  X_BUF #(
    .LOC ( "SLICE_X14Y28" ))
  \fsm/segment1_o<3>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\fsm/segment1_o<3>/CLKINV_1485 )
  );
  X_BUF #(
    .LOC ( "SLICE_X19Y30" ))
  \data_io<6>_MLTSRCEDGE/YUSED  (
    .I(N26),
    .O(N26_0)
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y31" ))
  \fsm/data_to_write_not0001/YUSED  (
    .I(N12),
    .O(N12_0)
  );
  X_ZERO #(
    .LOC ( "SLICE_X13Y16" ))
  \Result<0>/LOGIC_ZERO  (
    .O(\Result<0>/LOGIC_ZERO_1570 )
  );
  X_ONE #(
    .LOC ( "SLICE_X13Y16" ))
  \Result<0>/LOGIC_ONE  (
    .O(\Result<0>/LOGIC_ONE_1587 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y16" ))
  \Result<0>/XUSED  (
    .I(\Result<0>/XORF_1588 ),
    .O(Result[0])
  );
  X_XOR2 #(
    .LOC ( "SLICE_X13Y16" ))
  \Result<0>/XORF  (
    .I0(\Result<0>/CYINIT_1586 ),
    .I1(\divider/Mcount_counter_lut [0]),
    .O(\Result<0>/XORF_1588 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y16" ))
  \Result<0>/CYMUXF  (
    .IA(\Result<0>/LOGIC_ONE_1587 ),
    .IB(\Result<0>/CYINIT_1586 ),
    .SEL(\Result<0>/CYSELF_1577 ),
    .O(\divider/Mcount_counter_cy[0] )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y16" ))
  \Result<0>/CYINIT  (
    .I(\Result<0>/BXINV_1575 ),
    .O(\Result<0>/CYINIT_1586 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y16" ))
  \Result<0>/CYSELF  (
    .I(\divider/Mcount_counter_lut [0]),
    .O(\Result<0>/CYSELF_1577 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y16" ))
  \Result<0>/BXINV  (
    .I(1'b0),
    .O(\Result<0>/BXINV_1575 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y16" ))
  \Result<0>/YUSED  (
    .I(\Result<0>/XORG_1573 ),
    .O(Result[1])
  );
  X_XOR2 #(
    .LOC ( "SLICE_X13Y16" ))
  \Result<0>/XORG  (
    .I0(\divider/Mcount_counter_cy[0] ),
    .I1(\Result<0>/G ),
    .O(\Result<0>/XORG_1573 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y16" ))
  \Result<0>/COUTUSED  (
    .I(\Result<0>/CYMUXG_1572 ),
    .O(\divider/Mcount_counter_cy[1] )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y16" ))
  \Result<0>/CYMUXG  (
    .IA(\Result<0>/LOGIC_ZERO_1570 ),
    .IB(\divider/Mcount_counter_cy[0] ),
    .SEL(\Result<0>/CYSELG_1561 ),
    .O(\Result<0>/CYMUXG_1572 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y16" ))
  \Result<0>/CYSELG  (
    .I(\Result<0>/G ),
    .O(\Result<0>/CYSELG_1561 )
  );
  X_ZERO #(
    .LOC ( "SLICE_X13Y17" ))
  \Result<2>/LOGIC_ZERO  (
    .O(\Result<2>/LOGIC_ZERO_1606 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y17" ))
  \Result<2>/XUSED  (
    .I(\Result<2>/XORF_1626 ),
    .O(Result[2])
  );
  X_XOR2 #(
    .LOC ( "SLICE_X13Y17" ))
  \Result<2>/XORF  (
    .I0(\Result<2>/CYINIT_1625 ),
    .I1(\Result<2>/F ),
    .O(\Result<2>/XORF_1626 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y17" ))
  \Result<2>/CYMUXF  (
    .IA(\Result<2>/LOGIC_ZERO_1606 ),
    .IB(\Result<2>/CYINIT_1625 ),
    .SEL(\Result<2>/CYSELF_1612 ),
    .O(\divider/Mcount_counter_cy[2] )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y17" ))
  \Result<2>/CYMUXF2  (
    .IA(\Result<2>/LOGIC_ZERO_1606 ),
    .IB(\Result<2>/LOGIC_ZERO_1606 ),
    .SEL(\Result<2>/CYSELF_1612 ),
    .O(\Result<2>/CYMUXF2_1607 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y17" ))
  \Result<2>/CYINIT  (
    .I(\divider/Mcount_counter_cy[1] ),
    .O(\Result<2>/CYINIT_1625 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y17" ))
  \Result<2>/CYSELF  (
    .I(\Result<2>/F ),
    .O(\Result<2>/CYSELF_1612 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y17" ))
  \Result<2>/YUSED  (
    .I(\Result<2>/XORG_1614 ),
    .O(Result[3])
  );
  X_XOR2 #(
    .LOC ( "SLICE_X13Y17" ))
  \Result<2>/XORG  (
    .I0(\divider/Mcount_counter_cy[2] ),
    .I1(\Result<2>/G ),
    .O(\Result<2>/XORG_1614 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y17" ))
  \Result<2>/COUTUSED  (
    .I(\Result<2>/CYMUXFAST_1611 ),
    .O(\divider/Mcount_counter_cy[3] )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y17" ))
  \Result<2>/FASTCARRY  (
    .I(\divider/Mcount_counter_cy[1] ),
    .O(\Result<2>/FASTCARRY_1609 )
  );
  X_AND2 #(
    .LOC ( "SLICE_X13Y17" ))
  \Result<2>/CYAND  (
    .I0(\Result<2>/CYSELG_1597 ),
    .I1(\Result<2>/CYSELF_1612 ),
    .O(\Result<2>/CYAND_1610 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y17" ))
  \Result<2>/CYMUXFAST  (
    .IA(\Result<2>/CYMUXG2_1608 ),
    .IB(\Result<2>/FASTCARRY_1609 ),
    .SEL(\Result<2>/CYAND_1610 ),
    .O(\Result<2>/CYMUXFAST_1611 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y17" ))
  \Result<2>/CYMUXG2  (
    .IA(\Result<2>/LOGIC_ZERO_1606 ),
    .IB(\Result<2>/CYMUXF2_1607 ),
    .SEL(\Result<2>/CYSELG_1597 ),
    .O(\Result<2>/CYMUXG2_1608 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y17" ))
  \Result<2>/CYSELG  (
    .I(\Result<2>/G ),
    .O(\Result<2>/CYSELG_1597 )
  );
  X_ZERO #(
    .LOC ( "SLICE_X13Y18" ))
  \Result<4>/LOGIC_ZERO  (
    .O(\Result<4>/LOGIC_ZERO_1644 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y18" ))
  \Result<4>/XUSED  (
    .I(\Result<4>/XORF_1664 ),
    .O(Result[4])
  );
  X_XOR2 #(
    .LOC ( "SLICE_X13Y18" ))
  \Result<4>/XORF  (
    .I0(\Result<4>/CYINIT_1663 ),
    .I1(\Result<4>/F ),
    .O(\Result<4>/XORF_1664 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y18" ))
  \Result<4>/CYMUXF  (
    .IA(\Result<4>/LOGIC_ZERO_1644 ),
    .IB(\Result<4>/CYINIT_1663 ),
    .SEL(\Result<4>/CYSELF_1650 ),
    .O(\divider/Mcount_counter_cy[4] )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y18" ))
  \Result<4>/CYMUXF2  (
    .IA(\Result<4>/LOGIC_ZERO_1644 ),
    .IB(\Result<4>/LOGIC_ZERO_1644 ),
    .SEL(\Result<4>/CYSELF_1650 ),
    .O(\Result<4>/CYMUXF2_1645 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y18" ))
  \Result<4>/CYINIT  (
    .I(\divider/Mcount_counter_cy[3] ),
    .O(\Result<4>/CYINIT_1663 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y18" ))
  \Result<4>/CYSELF  (
    .I(\Result<4>/F ),
    .O(\Result<4>/CYSELF_1650 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y18" ))
  \Result<4>/YUSED  (
    .I(\Result<4>/XORG_1652 ),
    .O(Result[5])
  );
  X_XOR2 #(
    .LOC ( "SLICE_X13Y18" ))
  \Result<4>/XORG  (
    .I0(\divider/Mcount_counter_cy[4] ),
    .I1(\Result<4>/G ),
    .O(\Result<4>/XORG_1652 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y18" ))
  \Result<4>/COUTUSED  (
    .I(\Result<4>/CYMUXFAST_1649 ),
    .O(\divider/Mcount_counter_cy[5] )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y18" ))
  \Result<4>/FASTCARRY  (
    .I(\divider/Mcount_counter_cy[3] ),
    .O(\Result<4>/FASTCARRY_1647 )
  );
  X_AND2 #(
    .LOC ( "SLICE_X13Y18" ))
  \Result<4>/CYAND  (
    .I0(\Result<4>/CYSELG_1635 ),
    .I1(\Result<4>/CYSELF_1650 ),
    .O(\Result<4>/CYAND_1648 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y18" ))
  \Result<4>/CYMUXFAST  (
    .IA(\Result<4>/CYMUXG2_1646 ),
    .IB(\Result<4>/FASTCARRY_1647 ),
    .SEL(\Result<4>/CYAND_1648 ),
    .O(\Result<4>/CYMUXFAST_1649 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y18" ))
  \Result<4>/CYMUXG2  (
    .IA(\Result<4>/LOGIC_ZERO_1644 ),
    .IB(\Result<4>/CYMUXF2_1645 ),
    .SEL(\Result<4>/CYSELG_1635 ),
    .O(\Result<4>/CYMUXG2_1646 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y18" ))
  \Result<4>/CYSELG  (
    .I(\Result<4>/G ),
    .O(\Result<4>/CYSELG_1635 )
  );
  X_ZERO #(
    .LOC ( "SLICE_X13Y19" ))
  \Result<6>/LOGIC_ZERO  (
    .O(\Result<6>/LOGIC_ZERO_1682 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y19" ))
  \Result<6>/XUSED  (
    .I(\Result<6>/XORF_1702 ),
    .O(Result[6])
  );
  X_XOR2 #(
    .LOC ( "SLICE_X13Y19" ))
  \Result<6>/XORF  (
    .I0(\Result<6>/CYINIT_1701 ),
    .I1(\Result<6>/F ),
    .O(\Result<6>/XORF_1702 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y19" ))
  \Result<6>/CYMUXF  (
    .IA(\Result<6>/LOGIC_ZERO_1682 ),
    .IB(\Result<6>/CYINIT_1701 ),
    .SEL(\Result<6>/CYSELF_1688 ),
    .O(\divider/Mcount_counter_cy[6] )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y19" ))
  \Result<6>/CYMUXF2  (
    .IA(\Result<6>/LOGIC_ZERO_1682 ),
    .IB(\Result<6>/LOGIC_ZERO_1682 ),
    .SEL(\Result<6>/CYSELF_1688 ),
    .O(\Result<6>/CYMUXF2_1683 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y19" ))
  \Result<6>/CYINIT  (
    .I(\divider/Mcount_counter_cy[5] ),
    .O(\Result<6>/CYINIT_1701 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y19" ))
  \Result<6>/CYSELF  (
    .I(\Result<6>/F ),
    .O(\Result<6>/CYSELF_1688 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y19" ))
  \Result<6>/YUSED  (
    .I(\Result<6>/XORG_1690 ),
    .O(Result[7])
  );
  X_XOR2 #(
    .LOC ( "SLICE_X13Y19" ))
  \Result<6>/XORG  (
    .I0(\divider/Mcount_counter_cy[6] ),
    .I1(\Result<6>/G ),
    .O(\Result<6>/XORG_1690 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y19" ))
  \Result<6>/COUTUSED  (
    .I(\Result<6>/CYMUXFAST_1687 ),
    .O(\divider/Mcount_counter_cy[7] )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y19" ))
  \Result<6>/FASTCARRY  (
    .I(\divider/Mcount_counter_cy[5] ),
    .O(\Result<6>/FASTCARRY_1685 )
  );
  X_AND2 #(
    .LOC ( "SLICE_X13Y19" ))
  \Result<6>/CYAND  (
    .I0(\Result<6>/CYSELG_1673 ),
    .I1(\Result<6>/CYSELF_1688 ),
    .O(\Result<6>/CYAND_1686 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y19" ))
  \Result<6>/CYMUXFAST  (
    .IA(\Result<6>/CYMUXG2_1684 ),
    .IB(\Result<6>/FASTCARRY_1685 ),
    .SEL(\Result<6>/CYAND_1686 ),
    .O(\Result<6>/CYMUXFAST_1687 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y19" ))
  \Result<6>/CYMUXG2  (
    .IA(\Result<6>/LOGIC_ZERO_1682 ),
    .IB(\Result<6>/CYMUXF2_1683 ),
    .SEL(\Result<6>/CYSELG_1673 ),
    .O(\Result<6>/CYMUXG2_1684 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y19" ))
  \Result<6>/CYSELG  (
    .I(\Result<6>/G ),
    .O(\Result<6>/CYSELG_1673 )
  );
  X_ZERO #(
    .LOC ( "SLICE_X13Y20" ))
  \Result<8>/LOGIC_ZERO  (
    .O(\Result<8>/LOGIC_ZERO_1720 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y20" ))
  \Result<8>/XUSED  (
    .I(\Result<8>/XORF_1740 ),
    .O(Result[8])
  );
  X_XOR2 #(
    .LOC ( "SLICE_X13Y20" ))
  \Result<8>/XORF  (
    .I0(\Result<8>/CYINIT_1739 ),
    .I1(\Result<8>/F ),
    .O(\Result<8>/XORF_1740 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y20" ))
  \Result<8>/CYMUXF  (
    .IA(\Result<8>/LOGIC_ZERO_1720 ),
    .IB(\Result<8>/CYINIT_1739 ),
    .SEL(\Result<8>/CYSELF_1726 ),
    .O(\divider/Mcount_counter_cy[8] )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y20" ))
  \Result<8>/CYMUXF2  (
    .IA(\Result<8>/LOGIC_ZERO_1720 ),
    .IB(\Result<8>/LOGIC_ZERO_1720 ),
    .SEL(\Result<8>/CYSELF_1726 ),
    .O(\Result<8>/CYMUXF2_1721 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y20" ))
  \Result<8>/CYINIT  (
    .I(\divider/Mcount_counter_cy[7] ),
    .O(\Result<8>/CYINIT_1739 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y20" ))
  \Result<8>/CYSELF  (
    .I(\Result<8>/F ),
    .O(\Result<8>/CYSELF_1726 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y20" ))
  \Result<8>/YUSED  (
    .I(\Result<8>/XORG_1728 ),
    .O(Result[9])
  );
  X_XOR2 #(
    .LOC ( "SLICE_X13Y20" ))
  \Result<8>/XORG  (
    .I0(\divider/Mcount_counter_cy[8] ),
    .I1(\Result<8>/G ),
    .O(\Result<8>/XORG_1728 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y20" ))
  \Result<8>/COUTUSED  (
    .I(\Result<8>/CYMUXFAST_1725 ),
    .O(\divider/Mcount_counter_cy[9] )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y20" ))
  \Result<8>/FASTCARRY  (
    .I(\divider/Mcount_counter_cy[7] ),
    .O(\Result<8>/FASTCARRY_1723 )
  );
  X_AND2 #(
    .LOC ( "SLICE_X13Y20" ))
  \Result<8>/CYAND  (
    .I0(\Result<8>/CYSELG_1711 ),
    .I1(\Result<8>/CYSELF_1726 ),
    .O(\Result<8>/CYAND_1724 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y20" ))
  \Result<8>/CYMUXFAST  (
    .IA(\Result<8>/CYMUXG2_1722 ),
    .IB(\Result<8>/FASTCARRY_1723 ),
    .SEL(\Result<8>/CYAND_1724 ),
    .O(\Result<8>/CYMUXFAST_1725 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y20" ))
  \Result<8>/CYMUXG2  (
    .IA(\Result<8>/LOGIC_ZERO_1720 ),
    .IB(\Result<8>/CYMUXF2_1721 ),
    .SEL(\Result<8>/CYSELG_1711 ),
    .O(\Result<8>/CYMUXG2_1722 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y20" ))
  \Result<8>/CYSELG  (
    .I(\Result<8>/G ),
    .O(\Result<8>/CYSELG_1711 )
  );
  X_ZERO #(
    .LOC ( "SLICE_X13Y21" ))
  \Result<10>/LOGIC_ZERO  (
    .O(\Result<10>/LOGIC_ZERO_1758 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y21" ))
  \Result<10>/XUSED  (
    .I(\Result<10>/XORF_1778 ),
    .O(Result[10])
  );
  X_XOR2 #(
    .LOC ( "SLICE_X13Y21" ))
  \Result<10>/XORF  (
    .I0(\Result<10>/CYINIT_1777 ),
    .I1(\Result<10>/F ),
    .O(\Result<10>/XORF_1778 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y21" ))
  \Result<10>/CYMUXF  (
    .IA(\Result<10>/LOGIC_ZERO_1758 ),
    .IB(\Result<10>/CYINIT_1777 ),
    .SEL(\Result<10>/CYSELF_1764 ),
    .O(\divider/Mcount_counter_cy[10] )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y21" ))
  \Result<10>/CYMUXF2  (
    .IA(\Result<10>/LOGIC_ZERO_1758 ),
    .IB(\Result<10>/LOGIC_ZERO_1758 ),
    .SEL(\Result<10>/CYSELF_1764 ),
    .O(\Result<10>/CYMUXF2_1759 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y21" ))
  \Result<10>/CYINIT  (
    .I(\divider/Mcount_counter_cy[9] ),
    .O(\Result<10>/CYINIT_1777 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y21" ))
  \Result<10>/CYSELF  (
    .I(\Result<10>/F ),
    .O(\Result<10>/CYSELF_1764 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y21" ))
  \Result<10>/YUSED  (
    .I(\Result<10>/XORG_1766 ),
    .O(Result[11])
  );
  X_XOR2 #(
    .LOC ( "SLICE_X13Y21" ))
  \Result<10>/XORG  (
    .I0(\divider/Mcount_counter_cy[10] ),
    .I1(\Result<10>/G ),
    .O(\Result<10>/XORG_1766 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y21" ))
  \Result<10>/COUTUSED  (
    .I(\Result<10>/CYMUXFAST_1763 ),
    .O(\divider/Mcount_counter_cy[11] )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y21" ))
  \Result<10>/FASTCARRY  (
    .I(\divider/Mcount_counter_cy[9] ),
    .O(\Result<10>/FASTCARRY_1761 )
  );
  X_AND2 #(
    .LOC ( "SLICE_X13Y21" ))
  \Result<10>/CYAND  (
    .I0(\Result<10>/CYSELG_1749 ),
    .I1(\Result<10>/CYSELF_1764 ),
    .O(\Result<10>/CYAND_1762 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y21" ))
  \Result<10>/CYMUXFAST  (
    .IA(\Result<10>/CYMUXG2_1760 ),
    .IB(\Result<10>/FASTCARRY_1761 ),
    .SEL(\Result<10>/CYAND_1762 ),
    .O(\Result<10>/CYMUXFAST_1763 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y21" ))
  \Result<10>/CYMUXG2  (
    .IA(\Result<10>/LOGIC_ZERO_1758 ),
    .IB(\Result<10>/CYMUXF2_1759 ),
    .SEL(\Result<10>/CYSELG_1749 ),
    .O(\Result<10>/CYMUXG2_1760 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y21" ))
  \Result<10>/CYSELG  (
    .I(\Result<10>/G ),
    .O(\Result<10>/CYSELG_1749 )
  );
  X_ZERO #(
    .LOC ( "SLICE_X13Y22" ))
  \Result<12>/LOGIC_ZERO  (
    .O(\Result<12>/LOGIC_ZERO_1796 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y22" ))
  \Result<12>/XUSED  (
    .I(\Result<12>/XORF_1816 ),
    .O(Result[12])
  );
  X_XOR2 #(
    .LOC ( "SLICE_X13Y22" ))
  \Result<12>/XORF  (
    .I0(\Result<12>/CYINIT_1815 ),
    .I1(\Result<12>/F ),
    .O(\Result<12>/XORF_1816 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y22" ))
  \Result<12>/CYMUXF  (
    .IA(\Result<12>/LOGIC_ZERO_1796 ),
    .IB(\Result<12>/CYINIT_1815 ),
    .SEL(\Result<12>/CYSELF_1802 ),
    .O(\divider/Mcount_counter_cy[12] )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y22" ))
  \Result<12>/CYMUXF2  (
    .IA(\Result<12>/LOGIC_ZERO_1796 ),
    .IB(\Result<12>/LOGIC_ZERO_1796 ),
    .SEL(\Result<12>/CYSELF_1802 ),
    .O(\Result<12>/CYMUXF2_1797 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y22" ))
  \Result<12>/CYINIT  (
    .I(\divider/Mcount_counter_cy[11] ),
    .O(\Result<12>/CYINIT_1815 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y22" ))
  \Result<12>/CYSELF  (
    .I(\Result<12>/F ),
    .O(\Result<12>/CYSELF_1802 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y22" ))
  \Result<12>/YUSED  (
    .I(\Result<12>/XORG_1804 ),
    .O(Result[13])
  );
  X_XOR2 #(
    .LOC ( "SLICE_X13Y22" ))
  \Result<12>/XORG  (
    .I0(\divider/Mcount_counter_cy[12] ),
    .I1(\Result<12>/G ),
    .O(\Result<12>/XORG_1804 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y22" ))
  \Result<12>/COUTUSED  (
    .I(\Result<12>/CYMUXFAST_1801 ),
    .O(\divider/Mcount_counter_cy[13] )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y22" ))
  \Result<12>/FASTCARRY  (
    .I(\divider/Mcount_counter_cy[11] ),
    .O(\Result<12>/FASTCARRY_1799 )
  );
  X_AND2 #(
    .LOC ( "SLICE_X13Y22" ))
  \Result<12>/CYAND  (
    .I0(\Result<12>/CYSELG_1787 ),
    .I1(\Result<12>/CYSELF_1802 ),
    .O(\Result<12>/CYAND_1800 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y22" ))
  \Result<12>/CYMUXFAST  (
    .IA(\Result<12>/CYMUXG2_1798 ),
    .IB(\Result<12>/FASTCARRY_1799 ),
    .SEL(\Result<12>/CYAND_1800 ),
    .O(\Result<12>/CYMUXFAST_1801 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y22" ))
  \Result<12>/CYMUXG2  (
    .IA(\Result<12>/LOGIC_ZERO_1796 ),
    .IB(\Result<12>/CYMUXF2_1797 ),
    .SEL(\Result<12>/CYSELG_1787 ),
    .O(\Result<12>/CYMUXG2_1798 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y22" ))
  \Result<12>/CYSELG  (
    .I(\Result<12>/G ),
    .O(\Result<12>/CYSELG_1787 )
  );
  X_ZERO #(
    .LOC ( "SLICE_X13Y23" ))
  \Result<14>/LOGIC_ZERO  (
    .O(\Result<14>/LOGIC_ZERO_1834 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y23" ))
  \Result<14>/XUSED  (
    .I(\Result<14>/XORF_1854 ),
    .O(Result[14])
  );
  X_XOR2 #(
    .LOC ( "SLICE_X13Y23" ))
  \Result<14>/XORF  (
    .I0(\Result<14>/CYINIT_1853 ),
    .I1(\Result<14>/F ),
    .O(\Result<14>/XORF_1854 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y23" ))
  \Result<14>/CYMUXF  (
    .IA(\Result<14>/LOGIC_ZERO_1834 ),
    .IB(\Result<14>/CYINIT_1853 ),
    .SEL(\Result<14>/CYSELF_1840 ),
    .O(\divider/Mcount_counter_cy[14] )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y23" ))
  \Result<14>/CYMUXF2  (
    .IA(\Result<14>/LOGIC_ZERO_1834 ),
    .IB(\Result<14>/LOGIC_ZERO_1834 ),
    .SEL(\Result<14>/CYSELF_1840 ),
    .O(\Result<14>/CYMUXF2_1835 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y23" ))
  \Result<14>/CYINIT  (
    .I(\divider/Mcount_counter_cy[13] ),
    .O(\Result<14>/CYINIT_1853 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y23" ))
  \Result<14>/CYSELF  (
    .I(\Result<14>/F ),
    .O(\Result<14>/CYSELF_1840 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y23" ))
  \Result<14>/YUSED  (
    .I(\Result<14>/XORG_1842 ),
    .O(Result[15])
  );
  X_XOR2 #(
    .LOC ( "SLICE_X13Y23" ))
  \Result<14>/XORG  (
    .I0(\divider/Mcount_counter_cy[14] ),
    .I1(\Result<14>/G ),
    .O(\Result<14>/XORG_1842 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y23" ))
  \Result<14>/COUTUSED  (
    .I(\Result<14>/CYMUXFAST_1839 ),
    .O(\divider/Mcount_counter_cy[15] )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y23" ))
  \Result<14>/FASTCARRY  (
    .I(\divider/Mcount_counter_cy[13] ),
    .O(\Result<14>/FASTCARRY_1837 )
  );
  X_AND2 #(
    .LOC ( "SLICE_X13Y23" ))
  \Result<14>/CYAND  (
    .I0(\Result<14>/CYSELG_1825 ),
    .I1(\Result<14>/CYSELF_1840 ),
    .O(\Result<14>/CYAND_1838 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y23" ))
  \Result<14>/CYMUXFAST  (
    .IA(\Result<14>/CYMUXG2_1836 ),
    .IB(\Result<14>/FASTCARRY_1837 ),
    .SEL(\Result<14>/CYAND_1838 ),
    .O(\Result<14>/CYMUXFAST_1839 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y23" ))
  \Result<14>/CYMUXG2  (
    .IA(\Result<14>/LOGIC_ZERO_1834 ),
    .IB(\Result<14>/CYMUXF2_1835 ),
    .SEL(\Result<14>/CYSELG_1825 ),
    .O(\Result<14>/CYMUXG2_1836 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y23" ))
  \Result<14>/CYSELG  (
    .I(\Result<14>/G ),
    .O(\Result<14>/CYSELG_1825 )
  );
  X_ZERO #(
    .LOC ( "SLICE_X13Y24" ))
  \Result<16>/LOGIC_ZERO  (
    .O(\Result<16>/LOGIC_ZERO_1872 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y24" ))
  \Result<16>/XUSED  (
    .I(\Result<16>/XORF_1892 ),
    .O(Result[16])
  );
  X_XOR2 #(
    .LOC ( "SLICE_X13Y24" ))
  \Result<16>/XORF  (
    .I0(\Result<16>/CYINIT_1891 ),
    .I1(\Result<16>/F ),
    .O(\Result<16>/XORF_1892 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y24" ))
  \Result<16>/CYMUXF  (
    .IA(\Result<16>/LOGIC_ZERO_1872 ),
    .IB(\Result<16>/CYINIT_1891 ),
    .SEL(\Result<16>/CYSELF_1878 ),
    .O(\divider/Mcount_counter_cy[16] )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y24" ))
  \Result<16>/CYMUXF2  (
    .IA(\Result<16>/LOGIC_ZERO_1872 ),
    .IB(\Result<16>/LOGIC_ZERO_1872 ),
    .SEL(\Result<16>/CYSELF_1878 ),
    .O(\Result<16>/CYMUXF2_1873 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y24" ))
  \Result<16>/CYINIT  (
    .I(\divider/Mcount_counter_cy[15] ),
    .O(\Result<16>/CYINIT_1891 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y24" ))
  \Result<16>/CYSELF  (
    .I(\Result<16>/F ),
    .O(\Result<16>/CYSELF_1878 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y24" ))
  \Result<16>/YUSED  (
    .I(\Result<16>/XORG_1880 ),
    .O(Result[17])
  );
  X_XOR2 #(
    .LOC ( "SLICE_X13Y24" ))
  \Result<16>/XORG  (
    .I0(\divider/Mcount_counter_cy[16] ),
    .I1(\Result<16>/G ),
    .O(\Result<16>/XORG_1880 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y24" ))
  \Result<16>/COUTUSED  (
    .I(\Result<16>/CYMUXFAST_1877 ),
    .O(\divider/Mcount_counter_cy[17] )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y24" ))
  \Result<16>/FASTCARRY  (
    .I(\divider/Mcount_counter_cy[15] ),
    .O(\Result<16>/FASTCARRY_1875 )
  );
  X_AND2 #(
    .LOC ( "SLICE_X13Y24" ))
  \Result<16>/CYAND  (
    .I0(\Result<16>/CYSELG_1863 ),
    .I1(\Result<16>/CYSELF_1878 ),
    .O(\Result<16>/CYAND_1876 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y24" ))
  \Result<16>/CYMUXFAST  (
    .IA(\Result<16>/CYMUXG2_1874 ),
    .IB(\Result<16>/FASTCARRY_1875 ),
    .SEL(\Result<16>/CYAND_1876 ),
    .O(\Result<16>/CYMUXFAST_1877 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y24" ))
  \Result<16>/CYMUXG2  (
    .IA(\Result<16>/LOGIC_ZERO_1872 ),
    .IB(\Result<16>/CYMUXF2_1873 ),
    .SEL(\Result<16>/CYSELG_1863 ),
    .O(\Result<16>/CYMUXG2_1874 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y24" ))
  \Result<16>/CYSELG  (
    .I(\Result<16>/G ),
    .O(\Result<16>/CYSELG_1863 )
  );
  X_ZERO #(
    .LOC ( "SLICE_X13Y25" ))
  \Result<18>/LOGIC_ZERO  (
    .O(\Result<18>/LOGIC_ZERO_1910 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y25" ))
  \Result<18>/XUSED  (
    .I(\Result<18>/XORF_1930 ),
    .O(Result[18])
  );
  X_XOR2 #(
    .LOC ( "SLICE_X13Y25" ))
  \Result<18>/XORF  (
    .I0(\Result<18>/CYINIT_1929 ),
    .I1(\Result<18>/F ),
    .O(\Result<18>/XORF_1930 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y25" ))
  \Result<18>/CYMUXF  (
    .IA(\Result<18>/LOGIC_ZERO_1910 ),
    .IB(\Result<18>/CYINIT_1929 ),
    .SEL(\Result<18>/CYSELF_1916 ),
    .O(\divider/Mcount_counter_cy[18] )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y25" ))
  \Result<18>/CYMUXF2  (
    .IA(\Result<18>/LOGIC_ZERO_1910 ),
    .IB(\Result<18>/LOGIC_ZERO_1910 ),
    .SEL(\Result<18>/CYSELF_1916 ),
    .O(\Result<18>/CYMUXF2_1911 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y25" ))
  \Result<18>/CYINIT  (
    .I(\divider/Mcount_counter_cy[17] ),
    .O(\Result<18>/CYINIT_1929 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y25" ))
  \Result<18>/CYSELF  (
    .I(\Result<18>/F ),
    .O(\Result<18>/CYSELF_1916 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y25" ))
  \Result<18>/YUSED  (
    .I(\Result<18>/XORG_1918 ),
    .O(Result[19])
  );
  X_XOR2 #(
    .LOC ( "SLICE_X13Y25" ))
  \Result<18>/XORG  (
    .I0(\divider/Mcount_counter_cy[18] ),
    .I1(\Result<18>/G ),
    .O(\Result<18>/XORG_1918 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y25" ))
  \Result<18>/COUTUSED  (
    .I(\Result<18>/CYMUXFAST_1915 ),
    .O(\divider/Mcount_counter_cy[19] )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y25" ))
  \Result<18>/FASTCARRY  (
    .I(\divider/Mcount_counter_cy[17] ),
    .O(\Result<18>/FASTCARRY_1913 )
  );
  X_AND2 #(
    .LOC ( "SLICE_X13Y25" ))
  \Result<18>/CYAND  (
    .I0(\Result<18>/CYSELG_1901 ),
    .I1(\Result<18>/CYSELF_1916 ),
    .O(\Result<18>/CYAND_1914 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y25" ))
  \Result<18>/CYMUXFAST  (
    .IA(\Result<18>/CYMUXG2_1912 ),
    .IB(\Result<18>/FASTCARRY_1913 ),
    .SEL(\Result<18>/CYAND_1914 ),
    .O(\Result<18>/CYMUXFAST_1915 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y25" ))
  \Result<18>/CYMUXG2  (
    .IA(\Result<18>/LOGIC_ZERO_1910 ),
    .IB(\Result<18>/CYMUXF2_1911 ),
    .SEL(\Result<18>/CYSELG_1901 ),
    .O(\Result<18>/CYMUXG2_1912 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y25" ))
  \Result<18>/CYSELG  (
    .I(\Result<18>/G ),
    .O(\Result<18>/CYSELG_1901 )
  );
  X_ZERO #(
    .LOC ( "SLICE_X13Y26" ))
  \Result<20>/LOGIC_ZERO  (
    .O(\Result<20>/LOGIC_ZERO_1948 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y26" ))
  \Result<20>/XUSED  (
    .I(\Result<20>/XORF_1968 ),
    .O(Result[20])
  );
  X_XOR2 #(
    .LOC ( "SLICE_X13Y26" ))
  \Result<20>/XORF  (
    .I0(\Result<20>/CYINIT_1967 ),
    .I1(\Result<20>/F ),
    .O(\Result<20>/XORF_1968 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y26" ))
  \Result<20>/CYMUXF  (
    .IA(\Result<20>/LOGIC_ZERO_1948 ),
    .IB(\Result<20>/CYINIT_1967 ),
    .SEL(\Result<20>/CYSELF_1954 ),
    .O(\divider/Mcount_counter_cy[20] )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y26" ))
  \Result<20>/CYMUXF2  (
    .IA(\Result<20>/LOGIC_ZERO_1948 ),
    .IB(\Result<20>/LOGIC_ZERO_1948 ),
    .SEL(\Result<20>/CYSELF_1954 ),
    .O(\Result<20>/CYMUXF2_1949 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y26" ))
  \Result<20>/CYINIT  (
    .I(\divider/Mcount_counter_cy[19] ),
    .O(\Result<20>/CYINIT_1967 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y26" ))
  \Result<20>/CYSELF  (
    .I(\Result<20>/F ),
    .O(\Result<20>/CYSELF_1954 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y26" ))
  \Result<20>/YUSED  (
    .I(\Result<20>/XORG_1956 ),
    .O(Result[21])
  );
  X_XOR2 #(
    .LOC ( "SLICE_X13Y26" ))
  \Result<20>/XORG  (
    .I0(\divider/Mcount_counter_cy[20] ),
    .I1(\Result<20>/G ),
    .O(\Result<20>/XORG_1956 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y26" ))
  \Result<20>/FASTCARRY  (
    .I(\divider/Mcount_counter_cy[19] ),
    .O(\Result<20>/FASTCARRY_1951 )
  );
  X_AND2 #(
    .LOC ( "SLICE_X13Y26" ))
  \Result<20>/CYAND  (
    .I0(\Result<20>/CYSELG_1939 ),
    .I1(\Result<20>/CYSELF_1954 ),
    .O(\Result<20>/CYAND_1952 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y26" ))
  \Result<20>/CYMUXFAST  (
    .IA(\Result<20>/CYMUXG2_1950 ),
    .IB(\Result<20>/FASTCARRY_1951 ),
    .SEL(\Result<20>/CYAND_1952 ),
    .O(\Result<20>/CYMUXFAST_1953 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y26" ))
  \Result<20>/CYMUXG2  (
    .IA(\Result<20>/LOGIC_ZERO_1948 ),
    .IB(\Result<20>/CYMUXF2_1949 ),
    .SEL(\Result<20>/CYSELG_1939 ),
    .O(\Result<20>/CYMUXG2_1950 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y26" ))
  \Result<20>/CYSELG  (
    .I(\Result<20>/G ),
    .O(\Result<20>/CYSELG_1939 )
  );
  X_ZERO #(
    .LOC ( "SLICE_X13Y27" ))
  \Result<22>/LOGIC_ZERO  (
    .O(\Result<22>/LOGIC_ZERO_1998 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y27" ))
  \Result<22>/XUSED  (
    .I(\Result<22>/XORF_1999 ),
    .O(Result[22])
  );
  X_XOR2 #(
    .LOC ( "SLICE_X13Y27" ))
  \Result<22>/XORF  (
    .I0(\Result<22>/CYINIT_1997 ),
    .I1(\Result<22>/F ),
    .O(\Result<22>/XORF_1999 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X13Y27" ))
  \Result<22>/CYMUXF  (
    .IA(\Result<22>/LOGIC_ZERO_1998 ),
    .IB(\Result<22>/CYINIT_1997 ),
    .SEL(\Result<22>/CYSELF_1988 ),
    .O(\divider/Mcount_counter_cy[22] )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y27" ))
  \Result<22>/CYINIT  (
    .I(\Result<20>/CYMUXFAST_1953 ),
    .O(\Result<22>/CYINIT_1997 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y27" ))
  \Result<22>/CYSELF  (
    .I(\Result<22>/F ),
    .O(\Result<22>/CYSELF_1988 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y27" ))
  \Result<22>/YUSED  (
    .I(\Result<22>/XORG_1985 ),
    .O(Result[23])
  );
  X_XOR2 #(
    .LOC ( "SLICE_X13Y27" ))
  \Result<22>/XORG  (
    .I0(\divider/Mcount_counter_cy[22] ),
    .I1(\divider/counter<23>_rt_1982 ),
    .O(\Result<22>/XORG_1985 )
  );
  X_ZERO #(
    .LOC ( "SLICE_X12Y20" ))
  \divider/counter_cmp_eq0000_wg_cy<1>/LOGIC_ZERO  (
    .O(\divider/counter_cmp_eq0000_wg_cy<1>/LOGIC_ZERO_2018 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X12Y20" ))
  \divider/counter_cmp_eq0000_wg_cy<1>/CYMUXF  (
    .IA(\divider/counter_cmp_eq0000_wg_cy<1>/LOGIC_ZERO_2018 ),
    .IB(\divider/counter_cmp_eq0000_wg_cy<1>/CYINIT_2029 ),
    .SEL(\divider/counter_cmp_eq0000_wg_cy<1>/CYSELF_2023 ),
    .O(\divider/counter_cmp_eq0000_wg_cy [0])
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y20" ))
  \divider/counter_cmp_eq0000_wg_cy<1>/CYINIT  (
    .I(\divider/counter_cmp_eq0000_wg_cy<1>/BXINV_2021 ),
    .O(\divider/counter_cmp_eq0000_wg_cy<1>/CYINIT_2029 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y20" ))
  \divider/counter_cmp_eq0000_wg_cy<1>/CYSELF  (
    .I(\divider/counter_cmp_eq0000_wg_lut [0]),
    .O(\divider/counter_cmp_eq0000_wg_cy<1>/CYSELF_2023 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y20" ))
  \divider/counter_cmp_eq0000_wg_cy<1>/BXINV  (
    .I(1'b1),
    .O(\divider/counter_cmp_eq0000_wg_cy<1>/BXINV_2021 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X12Y20" ))
  \divider/counter_cmp_eq0000_wg_cy<1>/CYMUXG  (
    .IA(\divider/counter_cmp_eq0000_wg_cy<1>/LOGIC_ZERO_2018 ),
    .IB(\divider/counter_cmp_eq0000_wg_cy [0]),
    .SEL(\divider/counter_cmp_eq0000_wg_cy<1>/CYSELG_2012 ),
    .O(\divider/counter_cmp_eq0000_wg_cy<1>/CYMUXG_2020 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y20" ))
  \divider/counter_cmp_eq0000_wg_cy<1>/CYSELG  (
    .I(\divider/counter_cmp_eq0000_wg_lut [1]),
    .O(\divider/counter_cmp_eq0000_wg_cy<1>/CYSELG_2012 )
  );
  X_ZERO #(
    .LOC ( "SLICE_X12Y21" ))
  \divider/counter_cmp_eq0000_wg_cy<3>/LOGIC_ZERO  (
    .O(\divider/counter_cmp_eq0000_wg_cy<3>/LOGIC_ZERO_2047 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X12Y21" ))
  \divider/counter_cmp_eq0000_wg_cy<3>/CYMUXF2  (
    .IA(\divider/counter_cmp_eq0000_wg_cy<3>/LOGIC_ZERO_2047 ),
    .IB(\divider/counter_cmp_eq0000_wg_cy<3>/LOGIC_ZERO_2047 ),
    .SEL(\divider/counter_cmp_eq0000_wg_cy<3>/CYSELF_2053 ),
    .O(\divider/counter_cmp_eq0000_wg_cy<3>/CYMUXF2_2048 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y21" ))
  \divider/counter_cmp_eq0000_wg_cy<3>/CYSELF  (
    .I(\divider/counter_cmp_eq0000_wg_lut [2]),
    .O(\divider/counter_cmp_eq0000_wg_cy<3>/CYSELF_2053 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y21" ))
  \divider/counter_cmp_eq0000_wg_cy<3>/FASTCARRY  (
    .I(\divider/counter_cmp_eq0000_wg_cy<1>/CYMUXG_2020 ),
    .O(\divider/counter_cmp_eq0000_wg_cy<3>/FASTCARRY_2050 )
  );
  X_AND2 #(
    .LOC ( "SLICE_X12Y21" ))
  \divider/counter_cmp_eq0000_wg_cy<3>/CYAND  (
    .I0(\divider/counter_cmp_eq0000_wg_cy<3>/CYSELG_2041 ),
    .I1(\divider/counter_cmp_eq0000_wg_cy<3>/CYSELF_2053 ),
    .O(\divider/counter_cmp_eq0000_wg_cy<3>/CYAND_2051 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X12Y21" ))
  \divider/counter_cmp_eq0000_wg_cy<3>/CYMUXFAST  (
    .IA(\divider/counter_cmp_eq0000_wg_cy<3>/CYMUXG2_2049 ),
    .IB(\divider/counter_cmp_eq0000_wg_cy<3>/FASTCARRY_2050 ),
    .SEL(\divider/counter_cmp_eq0000_wg_cy<3>/CYAND_2051 ),
    .O(\divider/counter_cmp_eq0000_wg_cy<3>/CYMUXFAST_2052 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X12Y21" ))
  \divider/counter_cmp_eq0000_wg_cy<3>/CYMUXG2  (
    .IA(\divider/counter_cmp_eq0000_wg_cy<3>/LOGIC_ZERO_2047 ),
    .IB(\divider/counter_cmp_eq0000_wg_cy<3>/CYMUXF2_2048 ),
    .SEL(\divider/counter_cmp_eq0000_wg_cy<3>/CYSELG_2041 ),
    .O(\divider/counter_cmp_eq0000_wg_cy<3>/CYMUXG2_2049 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y21" ))
  \divider/counter_cmp_eq0000_wg_cy<3>/CYSELG  (
    .I(\divider/counter_cmp_eq0000_wg_lut [3]),
    .O(\divider/counter_cmp_eq0000_wg_cy<3>/CYSELG_2041 )
  );
  X_ZERO #(
    .LOC ( "SLICE_X12Y22" ))
  \divider/counter_cmp_eq0000/LOGIC_ZERO  (
    .O(\divider/counter_cmp_eq0000/LOGIC_ZERO_2077 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X12Y22" ))
  \divider/counter_cmp_eq0000/CYMUXF2  (
    .IA(\divider/counter_cmp_eq0000/LOGIC_ZERO_2077 ),
    .IB(\divider/counter_cmp_eq0000/LOGIC_ZERO_2077 ),
    .SEL(\divider/counter_cmp_eq0000/CYSELF_2083 ),
    .O(\divider/counter_cmp_eq0000/CYMUXF2_2078 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y22" ))
  \divider/counter_cmp_eq0000/CYSELF  (
    .I(\divider/counter_cmp_eq0000_wg_lut [4]),
    .O(\divider/counter_cmp_eq0000/CYSELF_2083 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y22" ))
  \divider/counter_cmp_eq0000/COUTUSED  (
    .I(\divider/counter_cmp_eq0000/CYMUXFAST_2082 ),
    .O(\divider/counter_cmp_eq0000 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y22" ))
  \divider/counter_cmp_eq0000/FASTCARRY  (
    .I(\divider/counter_cmp_eq0000_wg_cy<3>/CYMUXFAST_2052 ),
    .O(\divider/counter_cmp_eq0000/FASTCARRY_2080 )
  );
  X_AND2 #(
    .LOC ( "SLICE_X12Y22" ))
  \divider/counter_cmp_eq0000/CYAND  (
    .I0(\divider/counter_cmp_eq0000/CYSELG_2071 ),
    .I1(\divider/counter_cmp_eq0000/CYSELF_2083 ),
    .O(\divider/counter_cmp_eq0000/CYAND_2081 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X12Y22" ))
  \divider/counter_cmp_eq0000/CYMUXFAST  (
    .IA(\divider/counter_cmp_eq0000/CYMUXG2_2079 ),
    .IB(\divider/counter_cmp_eq0000/FASTCARRY_2080 ),
    .SEL(\divider/counter_cmp_eq0000/CYAND_2081 ),
    .O(\divider/counter_cmp_eq0000/CYMUXFAST_2082 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X12Y22" ))
  \divider/counter_cmp_eq0000/CYMUXG2  (
    .IA(\divider/counter_cmp_eq0000/LOGIC_ZERO_2077 ),
    .IB(\divider/counter_cmp_eq0000/CYMUXF2_2078 ),
    .SEL(\divider/counter_cmp_eq0000/CYSELG_2071 ),
    .O(\divider/counter_cmp_eq0000/CYMUXG2_2079 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y22" ))
  \divider/counter_cmp_eq0000/CYSELG  (
    .I(\divider/counter_cmp_eq0000_wg_lut [5]),
    .O(\divider/counter_cmp_eq0000/CYSELG_2071 )
  );
  X_OPAD #(
    .LOC ( "PAD17" ))
  \segment2_o/PAD  (
    .PAD(segment2_o)
  );
  X_OBUF #(
    .LOC ( "PAD17" ))
  segment2_o_OBUF (
    .I(\segment2_o/O ),
    .O(segment2_o)
  );
  X_OPAD #(
    .LOC ( "PAD18" ))
  \write_o/PAD  (
    .PAD(write_o)
  );
  X_OBUF #(
    .LOC ( "PAD18" ))
  write_o_OBUF (
    .I(\write_o/O ),
    .O(write_o)
  );
  X_IPAD #(
    .LOC ( "PAD77" ))
  \clk_i/PAD  (
    .PAD(clk_i)
  );
  X_BUF #(
    .LOC ( "PAD77" ))
  \clk_i_BUFGP/IBUFG  (
    .I(clk_i),
    .O(\clk_i/INBUF )
  );
  X_IPAD #(
    .LOC ( "PAD16" ))
  \value_write_i<0>/PAD  (
    .PAD(value_write_i[0])
  );
  X_BUF #(
    .LOC ( "PAD16" ))
  value_write_i_0_IBUF (
    .I(value_write_i[0]),
    .O(\value_write_i<0>/INBUF )
  );
  X_IPAD #(
    .LOC ( "PAD13" ))
  \value_write_i<1>/PAD  (
    .PAD(value_write_i[1])
  );
  X_BUF #(
    .LOC ( "PAD13" ))
  value_write_i_1_IBUF (
    .I(value_write_i[1]),
    .O(\value_write_i<1>/INBUF )
  );
  X_OPAD #(
    .LOC ( "PAD9" ))
  \write_enable_o/PAD  (
    .PAD(write_enable_o)
  );
  X_OBUF #(
    .LOC ( "PAD9" ))
  write_enable_o_OBUF (
    .I(\write_enable_o/O ),
    .O(write_enable_o)
  );
  X_IPAD #(
    .LOC ( "PAD11" ))
  \rst_i/PAD  (
    .PAD(rst_i)
  );
  X_BUF #(
    .LOC ( "PAD11" ))
  rst_i_IBUF (
    .I(rst_i),
    .O(\rst_i/INBUF )
  );
  X_OPAD #(
    .LOC ( "PAD32" ))
  \address_o<0>/PAD  (
    .PAD(address_o[0])
  );
  X_OBUF #(
    .LOC ( "PAD32" ))
  address_o_0_OBUF (
    .I(\address_o<0>/O ),
    .O(address_o[0])
  );
  X_BPAD #(
    .LOC ( "PAD33" ))
  \data_io<0>/PAD  (
    .PAD(data_io[0])
  );
  X_OBUFT #(
    .LOC ( "PAD33" ))
  \data_io_0_IOBUF/OBUFT  (
    .I(\data_io<0>/O ),
    .CTL(\data_io<0>/T ),
    .O(data_io[0])
  );
  X_BUF #(
    .LOC ( "PAD33" ))
  \data_io_0_IOBUF/IBUF  (
    .I(data_io[0]),
    .O(\data_io<0>/INBUF )
  );
  X_OPAD #(
    .LOC ( "PAD15" ))
  \read_o/PAD  (
    .PAD(read_o)
  );
  X_OBUF #(
    .LOC ( "PAD15" ))
  read_o_OBUF (
    .I(\read_o/O ),
    .O(read_o)
  );
  X_OPAD #(
    .LOC ( "PAD12" ))
  \address_o<1>/PAD  (
    .PAD(address_o[1])
  );
  X_OBUF #(
    .LOC ( "PAD12" ))
  address_o_1_OBUF (
    .I(\address_o<1>/O ),
    .O(address_o[1])
  );
  X_BPAD #(
    .LOC ( "PAD34" ))
  \data_io<1>/PAD  (
    .PAD(data_io[1])
  );
  X_OBUFT #(
    .LOC ( "PAD34" ))
  \data_io_1_IOBUF/OBUFT  (
    .I(\data_io<1>/O ),
    .CTL(\data_io<1>/T ),
    .O(data_io[1])
  );
  X_BUF #(
    .LOC ( "PAD34" ))
  \data_io_1_IOBUF/IBUF  (
    .I(data_io[1]),
    .O(\data_io<1>/INBUF )
  );
  X_OPAD #(
    .LOC ( "PAD30" ))
  \address_o<2>/PAD  (
    .PAD(address_o[2])
  );
  X_OBUF #(
    .LOC ( "PAD30" ))
  address_o_2_OBUF (
    .I(\address_o<2>/O ),
    .O(address_o[2])
  );
  X_BPAD #(
    .LOC ( "PAD26" ))
  \data_io<2>/PAD  (
    .PAD(data_io[2])
  );
  X_OBUFT #(
    .LOC ( "PAD26" ))
  \data_io_2_IOBUF/OBUFT  (
    .I(\data_io<2>/O ),
    .CTL(\data_io<2>/T ),
    .O(data_io[2])
  );
  X_BUF #(
    .LOC ( "PAD26" ))
  \data_io_2_IOBUF/IBUF  (
    .I(data_io[2]),
    .O(\data_io<2>/INBUF )
  );
  X_OPAD #(
    .LOC ( "PAD31" ))
  \address_o<3>/PAD  (
    .PAD(address_o[3])
  );
  X_OBUF #(
    .LOC ( "PAD31" ))
  address_o_3_OBUF (
    .I(\address_o<3>/O ),
    .O(address_o[3])
  );
  X_BPAD #(
    .LOC ( "PAD23" ))
  \data_io<3>/PAD  (
    .PAD(data_io[3])
  );
  X_OBUFT #(
    .LOC ( "PAD23" ))
  \data_io_3_IOBUF/OBUFT  (
    .I(\data_io<3>/O ),
    .CTL(\data_io<3>/T ),
    .O(data_io[3])
  );
  X_BUF #(
    .LOC ( "PAD23" ))
  \data_io_3_IOBUF/IBUF  (
    .I(data_io[3]),
    .O(\data_io<3>/INBUF )
  );
  X_OPAD #(
    .LOC ( "PAD22" ))
  \segment1_o<0>/PAD  (
    .PAD(segment1_o[0])
  );
  X_OBUF #(
    .LOC ( "PAD22" ))
  segment1_o_0_OBUF (
    .I(\segment1_o<0>/O ),
    .O(segment1_o[0])
  );
  X_BPAD #(
    .LOC ( "PAD24" ))
  \data_io<4>/PAD  (
    .PAD(data_io[4])
  );
  X_OBUFT #(
    .LOC ( "PAD24" ))
  \data_io_4_IOBUF/OBUFT  (
    .I(\data_io<4>/O ),
    .CTL(\data_io<4>/T ),
    .O(data_io[4])
  );
  X_BUF #(
    .LOC ( "PAD24" ))
  \data_io_4_IOBUF/IBUF  (
    .I(data_io[4]),
    .O(\data_io<4>/INBUF )
  );
  X_OPAD #(
    .LOC ( "PAD20" ))
  \segment1_o<1>/PAD  (
    .PAD(segment1_o[1])
  );
  X_OBUF #(
    .LOC ( "PAD20" ))
  segment1_o_1_OBUF (
    .I(\segment1_o<1>/O ),
    .O(segment1_o[1])
  );
  X_OPAD #(
    .LOC ( "PAD10" ))
  \output_enable_o/PAD  (
    .PAD(output_enable_o)
  );
  X_OBUF #(
    .LOC ( "PAD10" ))
  output_enable_o_OBUF (
    .I(\output_enable_o/O ),
    .O(output_enable_o)
  );
  X_BPAD #(
    .LOC ( "PAD25" ))
  \data_io<5>/PAD  (
    .PAD(data_io[5])
  );
  X_OBUFT #(
    .LOC ( "PAD25" ))
  \data_io_5_IOBUF/OBUFT  (
    .I(\data_io<5>/O ),
    .CTL(\data_io<5>/T ),
    .O(data_io[5])
  );
  X_BUF #(
    .LOC ( "PAD25" ))
  \data_io_5_IOBUF/IBUF  (
    .I(data_io[5]),
    .O(\data_io<5>/INBUF )
  );
  X_OPAD #(
    .LOC ( "PAD21" ))
  \segment1_o<2>/PAD  (
    .PAD(segment1_o[2])
  );
  X_OBUF #(
    .LOC ( "PAD21" ))
  segment1_o_2_OBUF (
    .I(\segment1_o<2>/O ),
    .O(segment1_o[2])
  );
  X_BPAD #(
    .LOC ( "PAD27" ))
  \data_io<6>/PAD  (
    .PAD(data_io[6])
  );
  X_OBUFT #(
    .LOC ( "PAD27" ))
  \data_io_6_IOBUF/OBUFT  (
    .I(\data_io<6>/O ),
    .CTL(\data_io<6>/T ),
    .O(data_io[6])
  );
  X_BUF #(
    .LOC ( "PAD27" ))
  \data_io_6_IOBUF/IBUF  (
    .I(data_io[6]),
    .O(\data_io<6>/INBUF )
  );
  X_OPAD #(
    .LOC ( "PAD19" ))
  \segment1_o<3>/PAD  (
    .PAD(segment1_o[3])
  );
  X_OBUF #(
    .LOC ( "PAD19" ))
  segment1_o_3_OBUF (
    .I(\segment1_o<3>/O ),
    .O(segment1_o[3])
  );
  X_BPAD #(
    .LOC ( "PAD28" ))
  \data_io<7>/PAD  (
    .PAD(data_io[7])
  );
  X_OBUFT #(
    .LOC ( "PAD28" ))
  \data_io_7_IOBUF/OBUFT  (
    .I(\data_io<7>/O ),
    .CTL(\data_io<7>/T ),
    .O(data_io[7])
  );
  X_BUF #(
    .LOC ( "PAD28" ))
  \data_io_7_IOBUF/IBUF  (
    .I(data_io[7]),
    .O(\data_io<7>/INBUF )
  );
  X_BUFGMUX #(
    .LOC ( "BUFGMUX0" ))
  \clk_i_BUFGP/BUFG  (
    .I0(\clk_i_BUFGP/BUFG/I0_INV ),
    .I1(GND),
    .S(\clk_i_BUFGP/BUFG/S_INVNOT ),
    .O(clk_i_BUFGP)
  );
  X_INV #(
    .LOC ( "BUFGMUX0" ))
  \clk_i_BUFGP/BUFG/SINV  (
    .I(1'b1),
    .O(\clk_i_BUFGP/BUFG/S_INVNOT )
  );
  X_BUF #(
    .LOC ( "BUFGMUX0" ))
  \clk_i_BUFGP/BUFG/I0_USED  (
    .I(\clk_i/INBUF ),
    .O(\clk_i_BUFGP/BUFG/I0_INV )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y30" ))
  \fsm/segment2_o/DXMUX  (
    .I(\fsm/segment2_o/F5MUX_2418 ),
    .O(\fsm/segment2_o/DXMUX_2420 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X12Y30" ))
  \fsm/segment2_o/F5MUX  (
    .IA(N72),
    .IB(N73),
    .SEL(\fsm/segment2_o/BXINV_2411 ),
    .O(\fsm/segment2_o/F5MUX_2418 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y30" ))
  \fsm/segment2_o/BXINV  (
    .I(\fsm/state [1]),
    .O(\fsm/segment2_o/BXINV_2411 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y30" ))
  \fsm/segment2_o/SRINV  (
    .I(N22),
    .O(\fsm/segment2_o/SRINV_2404 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y30" ))
  \fsm/segment2_o/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\fsm/segment2_o/CLKINV_2403 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X21Y28" ))
  \data_io<0>_MLTSRCEDGE/F5MUX  (
    .IA(\data_io<0>_MLTSRCEDGELogicTrst1_2438 ),
    .IB(\data_io<0>_MLTSRCEDGELogicTrst ),
    .SEL(\data_io<0>_MLTSRCEDGE/BXINV_2440 ),
    .O(\data_io<0>_MLTSRCEDGE/F5MUX_2448 )
  );
  X_BUF #(
    .LOC ( "SLICE_X21Y28" ))
  \data_io<0>_MLTSRCEDGE/BXINV  (
    .I(\fsm/write_enable_o_931 ),
    .O(\data_io<0>_MLTSRCEDGE/BXINV_2440 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X20Y29" ))
  \data_io<1>_MLTSRCEDGE/F5MUX  (
    .IA(\data_io<1>_MLTSRCEDGELogicTrst1_2463 ),
    .IB(\data_io<1>_MLTSRCEDGELogicTrst ),
    .SEL(\data_io<1>_MLTSRCEDGE/BXINV_2465 ),
    .O(\data_io<1>_MLTSRCEDGE/F5MUX_2473 )
  );
  X_BUF #(
    .LOC ( "SLICE_X20Y29" ))
  \data_io<1>_MLTSRCEDGE/BXINV  (
    .I(\fsm/write_enable_o_931 ),
    .O(\data_io<1>_MLTSRCEDGE/BXINV_2465 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X21Y30" ))
  \data_io<2>_MLTSRCEDGE/F5MUX  (
    .IA(\data_io<2>_MLTSRCEDGELogicTrst1_2488 ),
    .IB(\data_io<2>_MLTSRCEDGELogicTrst ),
    .SEL(\data_io<2>_MLTSRCEDGE/BXINV_2490 ),
    .O(\data_io<2>_MLTSRCEDGE/F5MUX_2498 )
  );
  X_BUF #(
    .LOC ( "SLICE_X21Y30" ))
  \data_io<2>_MLTSRCEDGE/BXINV  (
    .I(\fsm/write_enable_o_931 ),
    .O(\data_io<2>_MLTSRCEDGE/BXINV_2490 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X17Y31" ))
  \data_io<3>_MLTSRCEDGE/F5MUX  (
    .IA(\data_io<3>_MLTSRCEDGELogicTrst1_2513 ),
    .IB(\data_io<3>_MLTSRCEDGELogicTrst ),
    .SEL(\data_io<3>_MLTSRCEDGE/BXINV_2515 ),
    .O(\data_io<3>_MLTSRCEDGE/F5MUX_2523 )
  );
  X_BUF #(
    .LOC ( "SLICE_X17Y31" ))
  \data_io<3>_MLTSRCEDGE/BXINV  (
    .I(\fsm/write_enable_o_931 ),
    .O(\data_io<3>_MLTSRCEDGE/BXINV_2515 )
  );
  X_BUF #(
    .LOC ( "SLICE_X17Y28" ))
  \fsm/state_mux0000<2>259/XUSED  (
    .I(\fsm/state_mux0000<2>259/F5MUX_2548 ),
    .O(\fsm/state_mux0000<2>259 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X17Y28" ))
  \fsm/state_mux0000<2>259/F5MUX  (
    .IA(N74),
    .IB(N75),
    .SEL(\fsm/state_mux0000<2>259/BXINV_2541 ),
    .O(\fsm/state_mux0000<2>259/F5MUX_2548 )
  );
  X_BUF #(
    .LOC ( "SLICE_X17Y28" ))
  \fsm/state_mux0000<2>259/BXINV  (
    .I(\fsm/data_to_write [2]),
    .O(\fsm/state_mux0000<2>259/BXINV_2541 )
  );
  X_BUF #(
    .LOC ( "SLICE_X17Y30" ))
  \fsm/write_read_o/DXMUX  (
    .I(\fsm/write_read_o/F5MUX_2577 ),
    .O(\fsm/write_read_o/DXMUX_2579 )
  );
  X_MUX2 #(
    .LOC ( "SLICE_X17Y30" ))
  \fsm/write_read_o/F5MUX  (
    .IA(\fsm/state<3>_rt_2568 ),
    .IB(\fsm/write_read_o_mux000011_2575 ),
    .SEL(\fsm/write_read_o/BXINV_2570 ),
    .O(\fsm/write_read_o/F5MUX_2577 )
  );
  X_BUF #(
    .LOC ( "SLICE_X17Y30" ))
  \fsm/write_read_o/BXINV  (
    .I(\fsm/write_read_o_1054 ),
    .O(\fsm/write_read_o/BXINV_2570 )
  );
  X_BUF #(
    .LOC ( "SLICE_X17Y30" ))
  \fsm/write_read_o/SRINV  (
    .I(\fsm/state [1]),
    .O(\fsm/write_read_o/SRINV_2560 )
  );
  X_BUF #(
    .LOC ( "SLICE_X17Y30" ))
  \fsm/write_read_o/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\fsm/write_read_o/CLKINV_2559 )
  );
  X_BUF #(
    .LOC ( "SLICE_X16Y26" ))
  \fsm/address_o_3_1/DXMUX  (
    .I(\fsm/address_o_3_1/FXMUX_2610 ),
    .O(\fsm/address_o_3_1/DXMUX_2611 )
  );
  X_BUF #(
    .LOC ( "SLICE_X16Y26" ))
  \fsm/address_o_3_1/FXMUX  (
    .I(\fsm/address_o_mux0000 [0]),
    .O(\fsm/address_o_3_1/FXMUX_2610 )
  );
  X_BUF #(
    .LOC ( "SLICE_X16Y26" ))
  \fsm/address_o_3_1/YUSED  (
    .I(\fsm/address_o_mux0000<0>_SW0/O_pack_1 ),
    .O(\fsm/address_o_mux0000<0>_SW0/O )
  );
  X_BUF #(
    .LOC ( "SLICE_X16Y26" ))
  \fsm/address_o_3_1/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\fsm/address_o_3_1/CLKINV_2595 )
  );
  X_BUF #(
    .LOC ( "SLICE_X15Y27" ))
  \fsm/state<5>/DXMUX  (
    .I(\fsm/state_mux0000[1] ),
    .O(\fsm/state<5>/DXMUX_2641 )
  );
  X_BUF #(
    .LOC ( "SLICE_X15Y27" ))
  \fsm/state<5>/YUSED  (
    .I(\fsm/state_mux0000<1>_SW0/O_pack_2 ),
    .O(\fsm/state_mux0000<1>_SW0/O )
  );
  X_BUF #(
    .LOC ( "SLICE_X15Y27" ))
  \fsm/state<5>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\fsm/state<5>/CLKINV_2624 )
  );
  X_BUF #(
    .LOC ( "SLICE_X16Y28" ))
  \fsm/segment1_o<0>/DXMUX  (
    .I(\fsm/segment1_o_mux0000<0>1_2670 ),
    .O(\fsm/segment1_o<0>/DXMUX_2673 )
  );
  X_BUF #(
    .LOC ( "SLICE_X16Y28" ))
  \fsm/segment1_o<0>/YUSED  (
    .I(N11_pack_2),
    .O(N11)
  );
  X_BUF #(
    .LOC ( "SLICE_X16Y28" ))
  \fsm/segment1_o<0>/SRINV  (
    .I(\fsm/state [6]),
    .O(\fsm/segment1_o<0>/SRINV_2657 )
  );
  X_BUF #(
    .LOC ( "SLICE_X16Y28" ))
  \fsm/segment1_o<0>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\fsm/segment1_o<0>/CLKINV_2656 )
  );
  X_BUF #(
    .LOC ( "SLICE_X15Y29" ))
  \N5/XUSED  (
    .I(N5),
    .O(N5_0)
  );
  X_BUF #(
    .LOC ( "SLICE_X15Y29" ))
  \N5/YUSED  (
    .I(\fsm/segment1_o_mux0000<1>2_SW0/O_pack_1 ),
    .O(\fsm/segment1_o_mux0000<1>2_SW0/O )
  );
  X_BUF #(
    .LOC ( "SLICE_X15Y25" ))
  \fsm/state_mux0000<2>15/YUSED  (
    .I(N23_pack_1),
    .O(N23)
  );
  X_BUF #(
    .LOC ( "SLICE_X18Y26" ))
  \fsm/address_o_2_1/DXMUX  (
    .I(\fsm/address_o_2_1/FXMUX_2752 ),
    .O(\fsm/address_o_2_1/DXMUX_2753 )
  );
  X_BUF #(
    .LOC ( "SLICE_X18Y26" ))
  \fsm/address_o_2_1/FXMUX  (
    .I(\fsm/address_o_mux0000 [1]),
    .O(\fsm/address_o_2_1/FXMUX_2752 )
  );
  X_BUF #(
    .LOC ( "SLICE_X18Y26" ))
  \fsm/address_o_2_1/YUSED  (
    .I(\fsm/Madd_address_o_share0000_cy<1>11/O_pack_1 ),
    .O(\fsm/Madd_address_o_share0000_cy<1>11/O )
  );
  X_BUF #(
    .LOC ( "SLICE_X18Y26" ))
  \fsm/address_o_2_1/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\fsm/address_o_2_1/CLKINV_2736 )
  );
  X_BUF #(
    .LOC ( "SLICE_X16Y27" ))
  \fsm/address_o<1>/DXMUX  (
    .I(\fsm/address_o_mux0000 [2]),
    .O(\fsm/address_o<1>/DXMUX_2783 )
  );
  X_BUF #(
    .LOC ( "SLICE_X16Y27" ))
  \fsm/address_o<1>/YUSED  (
    .I(N9_pack_2),
    .O(N9)
  );
  X_BUF #(
    .LOC ( "SLICE_X16Y27" ))
  \fsm/address_o<1>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\fsm/address_o<1>/CLKINV_2768 )
  );
  X_BUF #(
    .LOC ( "SLICE_X14Y26" ))
  \fsm/state<3>/DXMUX  (
    .I(\fsm/state_mux0000[3] ),
    .O(\fsm/state<3>/DXMUX_2813 )
  );
  X_BUF #(
    .LOC ( "SLICE_X14Y26" ))
  \fsm/state<3>/YUSED  (
    .I(\fsm/state_mux0000<3>18/O_pack_1 ),
    .O(\fsm/state_mux0000<3>18/O )
  );
  X_BUF #(
    .LOC ( "SLICE_X14Y26" ))
  \fsm/state<3>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\fsm/state<3>/CLKINV_2797 )
  );
  X_BUF #(
    .LOC ( "SLICE_X19Y27" ))
  \fsm/address_o<0>/DXMUX  (
    .I(\fsm/address_o_mux0000 [3]),
    .O(\fsm/address_o<0>/DXMUX_2843 )
  );
  X_BUF #(
    .LOC ( "SLICE_X19Y27" ))
  \fsm/address_o<0>/YUSED  (
    .I(N4_pack_2),
    .O(N4)
  );
  X_BUF #(
    .LOC ( "SLICE_X19Y27" ))
  \fsm/address_o<0>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\fsm/address_o<0>/CLKINV_2827 )
  );
  X_BUF #(
    .LOC ( "SLICE_X17Y27" ))
  \fsm/state_mux0000<5>10/YUSED  (
    .I(\fsm/state_cmp_eq0013_pack_1 ),
    .O(\fsm/state_cmp_eq0013 )
  );
  X_BUF #(
    .LOC ( "SLICE_X17Y29" ))
  \N7/XUSED  (
    .I(N7),
    .O(N7_0)
  );
  X_BUF #(
    .LOC ( "SLICE_X17Y29" ))
  \N7/YUSED  (
    .I(\fsm/state_mux0000<2>2144/O_pack_1 ),
    .O(\fsm/state_mux0000<2>2144/O )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y28" ))
  \fsm/read_o/DXMUX  (
    .I(\fsm/read_o_mux00001_2925 ),
    .O(\fsm/read_o/DXMUX_2928 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y28" ))
  \fsm/read_o/DYMUX  (
    .I(\fsm/output_enable_o_mux00001_2913 ),
    .O(\fsm/read_o/DYMUX_2916 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y28" ))
  \fsm/read_o/SRINV  (
    .I(\fsm/state [6]),
    .O(\fsm/read_o/SRINV_2908 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y28" ))
  \fsm/read_o/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\fsm/read_o/CLKINV_2907 )
  );
  X_BUF #(
    .LOC ( "SLICE_X15Y30" ))
  \conterWR/counter<1>/DXMUX  (
    .I(\conterWR/Mcount_counter1 ),
    .O(\conterWR/counter<1>/DXMUX_2971 )
  );
  X_BUF #(
    .LOC ( "SLICE_X15Y30" ))
  \conterWR/counter<1>/DYMUX  (
    .I(\conterWR/Mcount_counter ),
    .O(\conterWR/counter<1>/DYMUX_2954 )
  );
  X_BUF #(
    .LOC ( "SLICE_X15Y30" ))
  \conterWR/counter<1>/SRINV  (
    .I(rst_i_IBUF_942),
    .O(\conterWR/counter<1>/SRINV_2944 )
  );
  X_BUF #(
    .LOC ( "SLICE_X15Y30" ))
  \conterWR/counter<1>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\conterWR/counter<1>/CLKINV_2943 )
  );
  X_BUF #(
    .LOC ( "SLICE_X15Y30" ))
  \conterWR/counter<1>/CEINV  (
    .I(\conterWR/counter_not0001 ),
    .O(\conterWR/counter<1>/CEINV_2942 )
  );
  X_BUF #(
    .LOC ( "SLICE_X11Y21" ))
  \divider/counter<11>/DXMUX  (
    .I(\divider/Mcount_counter_eqn_11 ),
    .O(\divider/counter<11>/DXMUX_3017 )
  );
  X_BUF #(
    .LOC ( "SLICE_X11Y21" ))
  \divider/counter<11>/DYMUX  (
    .I(\divider/Mcount_counter_eqn_10 ),
    .O(\divider/counter<11>/DYMUX_3000 )
  );
  X_BUF #(
    .LOC ( "SLICE_X11Y21" ))
  \divider/counter<11>/SRINV  (
    .I(rst_i_IBUF_942),
    .O(\divider/counter<11>/SRINV_2990 )
  );
  X_BUF #(
    .LOC ( "SLICE_X11Y21" ))
  \divider/counter<11>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\divider/counter<11>/CLKINV_2989 )
  );
  X_INV #(
    .LOC ( "SLICE_X11Y21" ))
  \divider/counter<11>/CEINV  (
    .I(\divider/hz_enable_clk_o_953 ),
    .O(\divider/counter<11>/CEINVNOT )
  );
  X_BUF #(
    .LOC ( "SLICE_X14Y30" ))
  \fsm/segment1_o<1>/DYMUX  (
    .I(\fsm/segment1_o_mux0000<1>1_3038 ),
    .O(\fsm/segment1_o<1>/DYMUX_3041 )
  );
  X_BUF #(
    .LOC ( "SLICE_X14Y30" ))
  \fsm/segment1_o<1>/SRINV  (
    .I(N261),
    .O(\fsm/segment1_o<1>/SRINV_3032 )
  );
  X_BUF #(
    .LOC ( "SLICE_X14Y30" ))
  \fsm/segment1_o<1>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\fsm/segment1_o<1>/CLKINV_3031 )
  );
  X_BUF #(
    .LOC ( "SLICE_X18Y29" ))
  \fsm/segment1_o<2>/DYMUX  (
    .I(\fsm/segment1_o_mux0000 [2]),
    .O(\fsm/segment1_o<2>/DYMUX_3060 )
  );
  X_BUF #(
    .LOC ( "SLICE_X18Y29" ))
  \fsm/segment1_o<2>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\fsm/segment1_o<2>/CLKINV_3052 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y26" ))
  \divider/counter<21>/DXMUX  (
    .I(\divider/Mcount_counter_eqn_21 ),
    .O(\divider/counter<21>/DXMUX_3102 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y26" ))
  \divider/counter<21>/DYMUX  (
    .I(\divider/Mcount_counter_eqn_20 ),
    .O(\divider/counter<21>/DYMUX_3085 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y26" ))
  \divider/counter<21>/SRINV  (
    .I(rst_i_IBUF_942),
    .O(\divider/counter<21>/SRINV_3075 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y26" ))
  \divider/counter<21>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\divider/counter<21>/CLKINV_3074 )
  );
  X_INV #(
    .LOC ( "SLICE_X12Y26" ))
  \divider/counter<21>/CEINV  (
    .I(\divider/hz_enable_clk_o_953 ),
    .O(\divider/counter<21>/CEINVNOT )
  );
  X_BUF #(
    .LOC ( "SLICE_X10Y22" ))
  \divider/counter<13>/DXMUX  (
    .I(\divider/Mcount_counter_eqn_13 ),
    .O(\divider/counter<13>/DXMUX_3148 )
  );
  X_BUF #(
    .LOC ( "SLICE_X10Y22" ))
  \divider/counter<13>/DYMUX  (
    .I(\divider/Mcount_counter_eqn_12 ),
    .O(\divider/counter<13>/DYMUX_3131 )
  );
  X_BUF #(
    .LOC ( "SLICE_X10Y22" ))
  \divider/counter<13>/SRINV  (
    .I(rst_i_IBUF_942),
    .O(\divider/counter<13>/SRINV_3121 )
  );
  X_BUF #(
    .LOC ( "SLICE_X10Y22" ))
  \divider/counter<13>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\divider/counter<13>/CLKINV_3120 )
  );
  X_INV #(
    .LOC ( "SLICE_X10Y22" ))
  \divider/counter<13>/CEINV  (
    .I(\divider/hz_enable_clk_o_953 ),
    .O(\divider/counter<13>/CEINVNOT )
  );
  X_LUT4 #(
    .INIT ( 16'h00AA ),
    .LOC ( "SLICE_X12Y27" ))
  \divider/Mcount_counter_eqn_231  (
    .ADR0(Result[23]),
    .ADR1(VCC),
    .ADR2(VCC),
    .ADR3(\divider/counter_cmp_eq0000 ),
    .O(\divider/Mcount_counter_eqn_23 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y27" ))
  \divider/counter<23>/FFX/RSTOR  (
    .I(\divider/counter<23>/SRINV_3167 ),
    .O(\divider/counter<23>/FFX/RST )
  );
  X_FF #(
    .LOC ( "SLICE_X12Y27" ),
    .INIT ( 1'b0 ))
  \divider/counter_23  (
    .I(\divider/counter<23>/DXMUX_3194 ),
    .CE(\divider/counter<23>/CEINVNOT ),
    .CLK(\divider/counter<23>/CLKINV_3166 ),
    .SET(GND),
    .RST(\divider/counter<23>/FFX/RST ),
    .O(\divider/counter [23])
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y27" ))
  \divider/counter<23>/DXMUX  (
    .I(\divider/Mcount_counter_eqn_23 ),
    .O(\divider/counter<23>/DXMUX_3194 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y27" ))
  \divider/counter<23>/DYMUX  (
    .I(\divider/Mcount_counter_eqn_22 ),
    .O(\divider/counter<23>/DYMUX_3177 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y27" ))
  \divider/counter<23>/SRINV  (
    .I(rst_i_IBUF_942),
    .O(\divider/counter<23>/SRINV_3167 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y27" ))
  \divider/counter<23>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\divider/counter<23>/CLKINV_3166 )
  );
  X_INV #(
    .LOC ( "SLICE_X12Y27" ))
  \divider/counter<23>/CEINV  (
    .I(\divider/hz_enable_clk_o_953 ),
    .O(\divider/counter<23>/CEINVNOT )
  );
  X_FF #(
    .LOC ( "SLICE_X12Y27" ),
    .INIT ( 1'b0 ))
  \divider/counter_22  (
    .I(\divider/counter<23>/DYMUX_3177 ),
    .CE(\divider/counter<23>/CEINVNOT ),
    .CLK(\divider/counter<23>/CLKINV_3166 ),
    .SET(GND),
    .RST(\divider/counter<23>/SRINV_3167 ),
    .O(\divider/counter [22])
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y23" ))
  \divider/counter<15>/FFY/RSTOR  (
    .I(\divider/counter<15>/SRINV_3213 ),
    .O(\divider/counter<15>/FFY/RST )
  );
  X_FF #(
    .LOC ( "SLICE_X12Y23" ),
    .INIT ( 1'b0 ))
  \divider/counter_14  (
    .I(\divider/counter<15>/DYMUX_3223 ),
    .CE(\divider/counter<15>/CEINVNOT ),
    .CLK(\divider/counter<15>/CLKINV_3212 ),
    .SET(GND),
    .RST(\divider/counter<15>/FFY/RST ),
    .O(\divider/counter [14])
  );
  X_LUT4 #(
    .INIT ( 16'h0A0A ),
    .LOC ( "SLICE_X12Y23" ))
  \divider/Mcount_counter_eqn_151  (
    .ADR0(Result[15]),
    .ADR1(VCC),
    .ADR2(\divider/counter_cmp_eq0000 ),
    .ADR3(VCC),
    .O(\divider/Mcount_counter_eqn_15 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y23" ))
  \divider/counter<15>/FFX/RSTOR  (
    .I(\divider/counter<15>/SRINV_3213 ),
    .O(\divider/counter<15>/FFX/RST )
  );
  X_FF #(
    .LOC ( "SLICE_X12Y23" ),
    .INIT ( 1'b0 ))
  \divider/counter_15  (
    .I(\divider/counter<15>/DXMUX_3240 ),
    .CE(\divider/counter<15>/CEINVNOT ),
    .CLK(\divider/counter<15>/CLKINV_3212 ),
    .SET(GND),
    .RST(\divider/counter<15>/FFX/RST ),
    .O(\divider/counter [15])
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y23" ))
  \divider/counter<15>/DXMUX  (
    .I(\divider/Mcount_counter_eqn_15 ),
    .O(\divider/counter<15>/DXMUX_3240 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y23" ))
  \divider/counter<15>/DYMUX  (
    .I(\divider/Mcount_counter_eqn_14 ),
    .O(\divider/counter<15>/DYMUX_3223 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y23" ))
  \divider/counter<15>/SRINV  (
    .I(rst_i_IBUF_942),
    .O(\divider/counter<15>/SRINV_3213 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y23" ))
  \divider/counter<15>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\divider/counter<15>/CLKINV_3212 )
  );
  X_INV #(
    .LOC ( "SLICE_X12Y23" ))
  \divider/counter<15>/CEINV  (
    .I(\divider/hz_enable_clk_o_953 ),
    .O(\divider/counter<15>/CEINVNOT )
  );
  X_LUT4 #(
    .INIT ( 16'h0F00 ),
    .LOC ( "SLICE_X12Y23" ))
  \divider/Mcount_counter_eqn_141  (
    .ADR0(VCC),
    .ADR1(VCC),
    .ADR2(\divider/counter_cmp_eq0000 ),
    .ADR3(Result[14]),
    .O(\divider/Mcount_counter_eqn_14 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y24" ))
  \divider/counter<17>/FFY/RSTOR  (
    .I(\divider/counter<17>/SRINV_3259 ),
    .O(\divider/counter<17>/FFY/RST )
  );
  X_FF #(
    .LOC ( "SLICE_X12Y24" ),
    .INIT ( 1'b0 ))
  \divider/counter_16  (
    .I(\divider/counter<17>/DYMUX_3269 ),
    .CE(\divider/counter<17>/CEINVNOT ),
    .CLK(\divider/counter<17>/CLKINV_3258 ),
    .SET(GND),
    .RST(\divider/counter<17>/FFY/RST ),
    .O(\divider/counter [16])
  );
  X_LUT4 #(
    .INIT ( 16'h00CC ),
    .LOC ( "SLICE_X12Y24" ))
  \divider/Mcount_counter_eqn_171  (
    .ADR0(VCC),
    .ADR1(Result[17]),
    .ADR2(VCC),
    .ADR3(\divider/counter_cmp_eq0000 ),
    .O(\divider/Mcount_counter_eqn_17 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y24" ))
  \divider/counter<17>/FFX/RSTOR  (
    .I(\divider/counter<17>/SRINV_3259 ),
    .O(\divider/counter<17>/FFX/RST )
  );
  X_FF #(
    .LOC ( "SLICE_X12Y24" ),
    .INIT ( 1'b0 ))
  \divider/counter_17  (
    .I(\divider/counter<17>/DXMUX_3286 ),
    .CE(\divider/counter<17>/CEINVNOT ),
    .CLK(\divider/counter<17>/CLKINV_3258 ),
    .SET(GND),
    .RST(\divider/counter<17>/FFX/RST ),
    .O(\divider/counter [17])
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y24" ))
  \divider/counter<17>/DXMUX  (
    .I(\divider/Mcount_counter_eqn_17 ),
    .O(\divider/counter<17>/DXMUX_3286 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y24" ))
  \divider/counter<17>/DYMUX  (
    .I(\divider/Mcount_counter_eqn_16 ),
    .O(\divider/counter<17>/DYMUX_3269 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y24" ))
  \divider/counter<17>/SRINV  (
    .I(rst_i_IBUF_942),
    .O(\divider/counter<17>/SRINV_3259 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y24" ))
  \divider/counter<17>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\divider/counter<17>/CLKINV_3258 )
  );
  X_INV #(
    .LOC ( "SLICE_X12Y24" ))
  \divider/counter<17>/CEINV  (
    .I(\divider/hz_enable_clk_o_953 ),
    .O(\divider/counter<17>/CEINVNOT )
  );
  X_LUT4 #(
    .INIT ( 16'h00F0 ),
    .LOC ( "SLICE_X12Y24" ))
  \divider/Mcount_counter_eqn_161  (
    .ADR0(VCC),
    .ADR1(VCC),
    .ADR2(Result[16]),
    .ADR3(\divider/counter_cmp_eq0000 ),
    .O(\divider/Mcount_counter_eqn_16 )
  );
  X_SFF #(
    .LOC ( "SLICE_X15Y24" ),
    .INIT ( 1'b1 ))
  \fsm/write_o  (
    .I(\fsm/write_o/DYMUX_3314 ),
    .CE(VCC),
    .CLK(\fsm/write_o/CLKINV_3304 ),
    .SET(GND),
    .RST(GND),
    .SSET(\fsm/write_o/SRINV_3305 ),
    .SRST(GND),
    .O(\fsm/write_o_1041 )
  );
  X_LUT4 #(
    .INIT ( 16'hCCC0 ),
    .LOC ( "SLICE_X15Y24" ))
  \fsm/state_mux0000<5>2  (
    .ADR0(VCC),
    .ADR1(\fsm/state [0]),
    .ADR2(rst_i_IBUF_942),
    .ADR3(\fsm/state [1]),
    .O(\fsm/state_mux0000<5>2_3324 )
  );
  X_BUF #(
    .LOC ( "SLICE_X15Y24" ))
  \fsm/write_o/XUSED  (
    .I(\fsm/state_mux0000<5>2_3324 ),
    .O(\fsm/state_mux0000<5>2_0 )
  );
  X_BUF #(
    .LOC ( "SLICE_X15Y24" ))
  \fsm/write_o/DYMUX  (
    .I(\fsm/write_o_mux00001 ),
    .O(\fsm/write_o/DYMUX_3314 )
  );
  X_BUF #(
    .LOC ( "SLICE_X15Y24" ))
  \fsm/write_o/SRINV  (
    .I(\fsm/state [3]),
    .O(\fsm/write_o/SRINV_3305 )
  );
  X_BUF #(
    .LOC ( "SLICE_X15Y24" ))
  \fsm/write_o/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\fsm/write_o/CLKINV_3304 )
  );
  X_LUT4 #(
    .INIT ( 16'hCCEE ),
    .LOC ( "SLICE_X15Y24" ))
  \fsm/write_o_mux000011  (
    .ADR0(\fsm/write_o_1041 ),
    .ADR1(\fsm/state [0]),
    .ADR2(VCC),
    .ADR3(\fsm/state [1]),
    .O(\fsm/write_o_mux00001 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y25" ))
  \divider/counter<19>/FFY/RSTOR  (
    .I(\divider/counter<19>/SRINV_3338 ),
    .O(\divider/counter<19>/FFY/RST )
  );
  X_FF #(
    .LOC ( "SLICE_X12Y25" ),
    .INIT ( 1'b0 ))
  \divider/counter_18  (
    .I(\divider/counter<19>/DYMUX_3348 ),
    .CE(\divider/counter<19>/CEINVNOT ),
    .CLK(\divider/counter<19>/CLKINV_3337 ),
    .SET(GND),
    .RST(\divider/counter<19>/FFY/RST ),
    .O(\divider/counter [18])
  );
  X_LUT4 #(
    .INIT ( 16'h00AA ),
    .LOC ( "SLICE_X12Y25" ))
  \divider/Mcount_counter_eqn_191  (
    .ADR0(Result[19]),
    .ADR1(VCC),
    .ADR2(VCC),
    .ADR3(\divider/counter_cmp_eq0000 ),
    .O(\divider/Mcount_counter_eqn_19 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y25" ))
  \divider/counter<19>/FFX/RSTOR  (
    .I(\divider/counter<19>/SRINV_3338 ),
    .O(\divider/counter<19>/FFX/RST )
  );
  X_FF #(
    .LOC ( "SLICE_X12Y25" ),
    .INIT ( 1'b0 ))
  \divider/counter_19  (
    .I(\divider/counter<19>/DXMUX_3365 ),
    .CE(\divider/counter<19>/CEINVNOT ),
    .CLK(\divider/counter<19>/CLKINV_3337 ),
    .SET(GND),
    .RST(\divider/counter<19>/FFX/RST ),
    .O(\divider/counter [19])
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y25" ))
  \divider/counter<19>/DXMUX  (
    .I(\divider/Mcount_counter_eqn_19 ),
    .O(\divider/counter<19>/DXMUX_3365 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y25" ))
  \divider/counter<19>/DYMUX  (
    .I(\divider/Mcount_counter_eqn_18 ),
    .O(\divider/counter<19>/DYMUX_3348 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y25" ))
  \divider/counter<19>/SRINV  (
    .I(rst_i_IBUF_942),
    .O(\divider/counter<19>/SRINV_3338 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y25" ))
  \divider/counter<19>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\divider/counter<19>/CLKINV_3337 )
  );
  X_INV #(
    .LOC ( "SLICE_X12Y25" ))
  \divider/counter<19>/CEINV  (
    .I(\divider/hz_enable_clk_o_953 ),
    .O(\divider/counter<19>/CEINVNOT )
  );
  X_LUT4 #(
    .INIT ( 16'h5500 ),
    .LOC ( "SLICE_X12Y25" ))
  \divider/Mcount_counter_eqn_181  (
    .ADR0(\divider/counter_cmp_eq0000 ),
    .ADR1(VCC),
    .ADR2(VCC),
    .ADR3(Result[18]),
    .O(\divider/Mcount_counter_eqn_18 )
  );
  X_SFF #(
    .LOC ( "SLICE_X18Y27" ),
    .INIT ( 1'b1 ))
  \fsm/write_enable_o  (
    .I(\fsm/write_enable_o/DYMUX_3393 ),
    .CE(VCC),
    .CLK(\fsm/write_enable_o/CLKINV_3384 ),
    .SET(GND),
    .RST(GND),
    .SSET(\fsm/write_enable_o/SRINV_3385 ),
    .SRST(GND),
    .O(\fsm/write_enable_o_931 )
  );
  X_LUT4 #(
    .INIT ( 16'h03CF ),
    .LOC ( "SLICE_X18Y27" ))
  \fsm/address_o_mux0000<0>1_SW0  (
    .ADR0(VCC),
    .ADR1(\fsm/state [2]),
    .ADR2(\fsm/state [0]),
    .ADR3(\divider/hz_enable_clk_o_953 ),
    .O(N18)
  );
  X_BUF #(
    .LOC ( "SLICE_X18Y27" ))
  \fsm/write_enable_o/XUSED  (
    .I(N18),
    .O(N18_0)
  );
  X_BUF #(
    .LOC ( "SLICE_X18Y27" ))
  \fsm/write_enable_o/DYMUX  (
    .I(\fsm/write_enable_o_mux00001_3390 ),
    .O(\fsm/write_enable_o/DYMUX_3393 )
  );
  X_BUF #(
    .LOC ( "SLICE_X18Y27" ))
  \fsm/write_enable_o/SRINV  (
    .I(\fsm/state [3]),
    .O(\fsm/write_enable_o/SRINV_3385 )
  );
  X_BUF #(
    .LOC ( "SLICE_X18Y27" ))
  \fsm/write_enable_o/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\fsm/write_enable_o/CLKINV_3384 )
  );
  X_LUT4 #(
    .INIT ( 16'hFCFE ),
    .LOC ( "SLICE_X18Y27" ))
  \fsm/write_enable_o_mux00001  (
    .ADR0(\fsm/write_enable_o_931 ),
    .ADR1(\fsm/state [2]),
    .ADR2(\fsm/state [0]),
    .ADR3(\fsm/state [1]),
    .O(\fsm/write_enable_o_mux00001_3390 )
  );
  X_LUT4 #(
    .INIT ( 16'h0C0C ),
    .LOC ( "SLICE_X12Y17" ))
  \divider/Mcount_counter_eqn_110  (
    .ADR0(VCC),
    .ADR1(Result[1]),
    .ADR2(\divider/counter_cmp_eq0000 ),
    .ADR3(VCC),
    .O(\divider/Mcount_counter_eqn_1 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y17" ))
  \divider/counter<1>/FFX/RSTOR  (
    .I(\divider/counter<1>/SRINV_3417 ),
    .O(\divider/counter<1>/FFX/RST )
  );
  X_FF #(
    .LOC ( "SLICE_X12Y17" ),
    .INIT ( 1'b0 ))
  \divider/counter_1  (
    .I(\divider/counter<1>/DXMUX_3444 ),
    .CE(\divider/counter<1>/CEINVNOT ),
    .CLK(\divider/counter<1>/CLKINV_3416 ),
    .SET(GND),
    .RST(\divider/counter<1>/FFX/RST ),
    .O(\divider/counter [1])
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y17" ))
  \divider/counter<1>/FFY/RSTOR  (
    .I(\divider/counter<1>/SRINV_3417 ),
    .O(\divider/counter<1>/FFY/RST )
  );
  X_FF #(
    .LOC ( "SLICE_X12Y17" ),
    .INIT ( 1'b0 ))
  \divider/counter_0  (
    .I(\divider/counter<1>/DYMUX_3427 ),
    .CE(\divider/counter<1>/CEINVNOT ),
    .CLK(\divider/counter<1>/CLKINV_3416 ),
    .SET(GND),
    .RST(\divider/counter<1>/FFY/RST ),
    .O(\divider/counter [0])
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y17" ))
  \divider/counter<1>/DXMUX  (
    .I(\divider/Mcount_counter_eqn_1 ),
    .O(\divider/counter<1>/DXMUX_3444 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y17" ))
  \divider/counter<1>/DYMUX  (
    .I(\divider/Mcount_counter_eqn_0 ),
    .O(\divider/counter<1>/DYMUX_3427 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y17" ))
  \divider/counter<1>/SRINV  (
    .I(rst_i_IBUF_942),
    .O(\divider/counter<1>/SRINV_3417 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y17" ))
  \divider/counter<1>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\divider/counter<1>/CLKINV_3416 )
  );
  X_INV #(
    .LOC ( "SLICE_X12Y17" ))
  \divider/counter<1>/CEINV  (
    .I(\divider/hz_enable_clk_o_953 ),
    .O(\divider/counter<1>/CEINVNOT )
  );
  X_LUT4 #(
    .INIT ( 16'h0F00 ),
    .LOC ( "SLICE_X12Y17" ))
  \divider/Mcount_counter_eqn_01  (
    .ADR0(VCC),
    .ADR1(VCC),
    .ADR2(\divider/counter_cmp_eq0000 ),
    .ADR3(Result[0]),
    .O(\divider/Mcount_counter_eqn_0 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y19" ))
  \divider/counter<3>/FFY/RSTOR  (
    .I(\divider/counter<3>/SRINV_3463 ),
    .O(\divider/counter<3>/FFY/RST )
  );
  X_FF #(
    .LOC ( "SLICE_X12Y19" ),
    .INIT ( 1'b0 ))
  \divider/counter_2  (
    .I(\divider/counter<3>/DYMUX_3473 ),
    .CE(\divider/counter<3>/CEINVNOT ),
    .CLK(\divider/counter<3>/CLKINV_3462 ),
    .SET(GND),
    .RST(\divider/counter<3>/FFY/RST ),
    .O(\divider/counter [2])
  );
  X_LUT4 #(
    .INIT ( 16'h0A0A ),
    .LOC ( "SLICE_X12Y19" ))
  \divider/Mcount_counter_eqn_31  (
    .ADR0(Result[3]),
    .ADR1(VCC),
    .ADR2(\divider/counter_cmp_eq0000 ),
    .ADR3(VCC),
    .O(\divider/Mcount_counter_eqn_3 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y19" ))
  \divider/counter<3>/FFX/RSTOR  (
    .I(\divider/counter<3>/SRINV_3463 ),
    .O(\divider/counter<3>/FFX/RST )
  );
  X_FF #(
    .LOC ( "SLICE_X12Y19" ),
    .INIT ( 1'b0 ))
  \divider/counter_3  (
    .I(\divider/counter<3>/DXMUX_3490 ),
    .CE(\divider/counter<3>/CEINVNOT ),
    .CLK(\divider/counter<3>/CLKINV_3462 ),
    .SET(GND),
    .RST(\divider/counter<3>/FFX/RST ),
    .O(\divider/counter [3])
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y19" ))
  \divider/counter<3>/DXMUX  (
    .I(\divider/Mcount_counter_eqn_3 ),
    .O(\divider/counter<3>/DXMUX_3490 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y19" ))
  \divider/counter<3>/DYMUX  (
    .I(\divider/Mcount_counter_eqn_2 ),
    .O(\divider/counter<3>/DYMUX_3473 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y19" ))
  \divider/counter<3>/SRINV  (
    .I(rst_i_IBUF_942),
    .O(\divider/counter<3>/SRINV_3463 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y19" ))
  \divider/counter<3>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\divider/counter<3>/CLKINV_3462 )
  );
  X_INV #(
    .LOC ( "SLICE_X12Y19" ))
  \divider/counter<3>/CEINV  (
    .I(\divider/hz_enable_clk_o_953 ),
    .O(\divider/counter<3>/CEINVNOT )
  );
  X_LUT4 #(
    .INIT ( 16'h0C0C ),
    .LOC ( "SLICE_X12Y19" ))
  \divider/Mcount_counter_eqn_24  (
    .ADR0(VCC),
    .ADR1(Result[2]),
    .ADR2(\divider/counter_cmp_eq0000 ),
    .ADR3(VCC),
    .O(\divider/Mcount_counter_eqn_2 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y18" ))
  \divider/counter<5>/FFY/RSTOR  (
    .I(\divider/counter<5>/SRINV_3509 ),
    .O(\divider/counter<5>/FFY/RST )
  );
  X_FF #(
    .LOC ( "SLICE_X12Y18" ),
    .INIT ( 1'b0 ))
  \divider/counter_4  (
    .I(\divider/counter<5>/DYMUX_3519 ),
    .CE(\divider/counter<5>/CEINVNOT ),
    .CLK(\divider/counter<5>/CLKINV_3508 ),
    .SET(GND),
    .RST(\divider/counter<5>/FFY/RST ),
    .O(\divider/counter [4])
  );
  X_LUT4 #(
    .INIT ( 16'h0C0C ),
    .LOC ( "SLICE_X12Y18" ))
  \divider/Mcount_counter_eqn_51  (
    .ADR0(VCC),
    .ADR1(Result[5]),
    .ADR2(\divider/counter_cmp_eq0000 ),
    .ADR3(VCC),
    .O(\divider/Mcount_counter_eqn_5 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y18" ))
  \divider/counter<5>/FFX/RSTOR  (
    .I(\divider/counter<5>/SRINV_3509 ),
    .O(\divider/counter<5>/FFX/RST )
  );
  X_FF #(
    .LOC ( "SLICE_X12Y18" ),
    .INIT ( 1'b0 ))
  \divider/counter_5  (
    .I(\divider/counter<5>/DXMUX_3536 ),
    .CE(\divider/counter<5>/CEINVNOT ),
    .CLK(\divider/counter<5>/CLKINV_3508 ),
    .SET(GND),
    .RST(\divider/counter<5>/FFX/RST ),
    .O(\divider/counter [5])
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y18" ))
  \divider/counter<5>/DXMUX  (
    .I(\divider/Mcount_counter_eqn_5 ),
    .O(\divider/counter<5>/DXMUX_3536 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y18" ))
  \divider/counter<5>/DYMUX  (
    .I(\divider/Mcount_counter_eqn_4 ),
    .O(\divider/counter<5>/DYMUX_3519 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y18" ))
  \divider/counter<5>/SRINV  (
    .I(rst_i_IBUF_942),
    .O(\divider/counter<5>/SRINV_3509 )
  );
  X_BUF #(
    .LOC ( "SLICE_X12Y18" ))
  \divider/counter<5>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\divider/counter<5>/CLKINV_3508 )
  );
  X_INV #(
    .LOC ( "SLICE_X12Y18" ))
  \divider/counter<5>/CEINV  (
    .I(\divider/hz_enable_clk_o_953 ),
    .O(\divider/counter<5>/CEINVNOT )
  );
  X_LUT4 #(
    .INIT ( 16'h0F00 ),
    .LOC ( "SLICE_X12Y18" ))
  \divider/Mcount_counter_eqn_41  (
    .ADR0(VCC),
    .ADR1(VCC),
    .ADR2(\divider/counter_cmp_eq0000 ),
    .ADR3(Result[4]),
    .O(\divider/Mcount_counter_eqn_4 )
  );
  X_BUF #(
    .LOC ( "SLICE_X11Y19" ))
  \divider/counter<7>/FFY/RSTOR  (
    .I(\divider/counter<7>/SRINV_3555 ),
    .O(\divider/counter<7>/FFY/RST )
  );
  X_FF #(
    .LOC ( "SLICE_X11Y19" ),
    .INIT ( 1'b0 ))
  \divider/counter_6  (
    .I(\divider/counter<7>/DYMUX_3565 ),
    .CE(\divider/counter<7>/CEINVNOT ),
    .CLK(\divider/counter<7>/CLKINV_3554 ),
    .SET(GND),
    .RST(\divider/counter<7>/FFY/RST ),
    .O(\divider/counter [6])
  );
  X_LUT4 #(
    .INIT ( 16'h2222 ),
    .LOC ( "SLICE_X11Y19" ))
  \divider/Mcount_counter_eqn_71  (
    .ADR0(Result[7]),
    .ADR1(\divider/counter_cmp_eq0000 ),
    .ADR2(VCC),
    .ADR3(VCC),
    .O(\divider/Mcount_counter_eqn_7 )
  );
  X_BUF #(
    .LOC ( "SLICE_X11Y19" ))
  \divider/counter<7>/FFX/RSTOR  (
    .I(\divider/counter<7>/SRINV_3555 ),
    .O(\divider/counter<7>/FFX/RST )
  );
  X_FF #(
    .LOC ( "SLICE_X11Y19" ),
    .INIT ( 1'b0 ))
  \divider/counter_7  (
    .I(\divider/counter<7>/DXMUX_3582 ),
    .CE(\divider/counter<7>/CEINVNOT ),
    .CLK(\divider/counter<7>/CLKINV_3554 ),
    .SET(GND),
    .RST(\divider/counter<7>/FFX/RST ),
    .O(\divider/counter [7])
  );
  X_BUF #(
    .LOC ( "SLICE_X11Y19" ))
  \divider/counter<7>/DXMUX  (
    .I(\divider/Mcount_counter_eqn_7 ),
    .O(\divider/counter<7>/DXMUX_3582 )
  );
  X_BUF #(
    .LOC ( "SLICE_X11Y19" ))
  \divider/counter<7>/DYMUX  (
    .I(\divider/Mcount_counter_eqn_6 ),
    .O(\divider/counter<7>/DYMUX_3565 )
  );
  X_BUF #(
    .LOC ( "SLICE_X11Y19" ))
  \divider/counter<7>/SRINV  (
    .I(rst_i_IBUF_942),
    .O(\divider/counter<7>/SRINV_3555 )
  );
  X_BUF #(
    .LOC ( "SLICE_X11Y19" ))
  \divider/counter<7>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\divider/counter<7>/CLKINV_3554 )
  );
  X_INV #(
    .LOC ( "SLICE_X11Y19" ))
  \divider/counter<7>/CEINV  (
    .I(\divider/hz_enable_clk_o_953 ),
    .O(\divider/counter<7>/CEINVNOT )
  );
  X_LUT4 #(
    .INIT ( 16'h3300 ),
    .LOC ( "SLICE_X11Y19" ))
  \divider/Mcount_counter_eqn_61  (
    .ADR0(VCC),
    .ADR1(\divider/counter_cmp_eq0000 ),
    .ADR2(VCC),
    .ADR3(Result[6]),
    .O(\divider/Mcount_counter_eqn_6 )
  );
  X_BUF #(
    .LOC ( "SLICE_X10Y21" ))
  \divider/counter<9>/FFY/RSTOR  (
    .I(\divider/counter<9>/SRINV_3601 ),
    .O(\divider/counter<9>/FFY/RST )
  );
  X_FF #(
    .LOC ( "SLICE_X10Y21" ),
    .INIT ( 1'b0 ))
  \divider/counter_8  (
    .I(\divider/counter<9>/DYMUX_3611 ),
    .CE(\divider/counter<9>/CEINVNOT ),
    .CLK(\divider/counter<9>/CLKINV_3600 ),
    .SET(GND),
    .RST(\divider/counter<9>/FFY/RST ),
    .O(\divider/counter [8])
  );
  X_LUT4 #(
    .INIT ( 16'h4444 ),
    .LOC ( "SLICE_X10Y21" ))
  \divider/Mcount_counter_eqn_91  (
    .ADR0(\divider/counter_cmp_eq0000 ),
    .ADR1(Result[9]),
    .ADR2(VCC),
    .ADR3(VCC),
    .O(\divider/Mcount_counter_eqn_9 )
  );
  X_BUF #(
    .LOC ( "SLICE_X10Y21" ))
  \divider/counter<9>/FFX/RSTOR  (
    .I(\divider/counter<9>/SRINV_3601 ),
    .O(\divider/counter<9>/FFX/RST )
  );
  X_FF #(
    .LOC ( "SLICE_X10Y21" ),
    .INIT ( 1'b0 ))
  \divider/counter_9  (
    .I(\divider/counter<9>/DXMUX_3628 ),
    .CE(\divider/counter<9>/CEINVNOT ),
    .CLK(\divider/counter<9>/CLKINV_3600 ),
    .SET(GND),
    .RST(\divider/counter<9>/FFX/RST ),
    .O(\divider/counter [9])
  );
  X_BUF #(
    .LOC ( "SLICE_X10Y21" ))
  \divider/counter<9>/DXMUX  (
    .I(\divider/Mcount_counter_eqn_9 ),
    .O(\divider/counter<9>/DXMUX_3628 )
  );
  X_BUF #(
    .LOC ( "SLICE_X10Y21" ))
  \divider/counter<9>/DYMUX  (
    .I(\divider/Mcount_counter_eqn_8 ),
    .O(\divider/counter<9>/DYMUX_3611 )
  );
  X_BUF #(
    .LOC ( "SLICE_X10Y21" ))
  \divider/counter<9>/SRINV  (
    .I(rst_i_IBUF_942),
    .O(\divider/counter<9>/SRINV_3601 )
  );
  X_BUF #(
    .LOC ( "SLICE_X10Y21" ))
  \divider/counter<9>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\divider/counter<9>/CLKINV_3600 )
  );
  X_INV #(
    .LOC ( "SLICE_X10Y21" ))
  \divider/counter<9>/CEINV  (
    .I(\divider/hz_enable_clk_o_953 ),
    .O(\divider/counter<9>/CEINVNOT )
  );
  X_LUT4 #(
    .INIT ( 16'h5500 ),
    .LOC ( "SLICE_X10Y21" ))
  \divider/Mcount_counter_eqn_81  (
    .ADR0(\divider/counter_cmp_eq0000 ),
    .ADR1(VCC),
    .ADR2(VCC),
    .ADR3(Result[8]),
    .O(\divider/Mcount_counter_eqn_8 )
  );
  X_FF #(
    .LOC ( "SLICE_X15Y31" ),
    .INIT ( 1'b0 ))
  \fsm/state_0  (
    .I(\fsm/state<0>/DYMUX_3657 ),
    .CE(\fsm/state<0>/CEINV_3648 ),
    .CLK(\fsm/state<0>/CLKINV_3649 ),
    .SET(GND),
    .RST(GND),
    .O(\fsm/state [0])
  );
  X_LUT4 #(
    .INIT ( 16'h10B0 ),
    .LOC ( "SLICE_X15Y31" ))
  \conterWR/counter_not00011  (
    .ADR0(\conterWR/counter [1]),
    .ADR1(\conterWR/time_ended_o_964 ),
    .ADR2(\fsm/write_read_o_1054 ),
    .ADR3(\conterWR/counter [0]),
    .O(\conterWR/counter_not0001 )
  );
  X_BUF #(
    .LOC ( "SLICE_X15Y31" ))
  \fsm/state<0>/DYMUX  (
    .I(\fsm/state_mux0000<6>1_3654 ),
    .O(\fsm/state<0>/DYMUX_3657 )
  );
  X_BUF #(
    .LOC ( "SLICE_X15Y31" ))
  \fsm/state<0>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\fsm/state<0>/CLKINV_3649 )
  );
  X_BUF #(
    .LOC ( "SLICE_X15Y31" ))
  \fsm/state<0>/CEINV  (
    .I(rst_i_IBUF_942),
    .O(\fsm/state<0>/CEINV_3648 )
  );
  X_LUT4 #(
    .INIT ( 16'hF0FE ),
    .LOC ( "SLICE_X15Y31" ))
  \fsm/state_mux0000<6>1  (
    .ADR0(\fsm/state [1]),
    .ADR1(\fsm/state [3]),
    .ADR2(N24_0),
    .ADR3(\conterWR/time_ended_o_964 ),
    .O(\fsm/state_mux0000<6>1_3654 )
  );
  X_LUT4 #(
    .INIT ( 16'h008A ),
    .LOC ( "SLICE_X17Y26" ))
  \fsm/state_mux0000<5>281  (
    .ADR0(\fsm/state [1]),
    .ADR1(N24_0),
    .ADR2(\conterWR/time_ended_o_964 ),
    .ADR3(rst_i_IBUF_942),
    .O(\fsm/state_mux0000<5>28 )
  );
  X_SFF #(
    .LOC ( "SLICE_X17Y26" ),
    .INIT ( 1'b1 ))
  \fsm/state_1  (
    .I(\fsm/state<1>/DYMUX_3685 ),
    .CE(VCC),
    .CLK(\fsm/state<1>/CLKINV_3676 ),
    .SET(GND),
    .RST(GND),
    .SSET(\fsm/state<1>/SRINV_3677 ),
    .SRST(GND),
    .O(\fsm/state [1])
  );
  X_BUF #(
    .LOC ( "SLICE_X17Y26" ))
  \fsm/state<1>/DYMUX  (
    .I(\fsm/state_mux0000<5>28 ),
    .O(\fsm/state<1>/DYMUX_3685 )
  );
  X_BUF #(
    .LOC ( "SLICE_X17Y26" ))
  \fsm/state<1>/SRINV  (
    .I(\fsm/state_mux0000<5>10_2868 ),
    .O(\fsm/state<1>/SRINV_3677 )
  );
  X_BUF #(
    .LOC ( "SLICE_X17Y26" ))
  \fsm/state<1>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\fsm/state<1>/CLKINV_3676 )
  );
  X_FF #(
    .LOC ( "SLICE_X13Y31" ),
    .INIT ( 1'b0 ))
  \fsm/state_2  (
    .I(\fsm/state<2>/DYMUX_3704 ),
    .CE(VCC),
    .CLK(\fsm/state<2>/CLKINV_3696 ),
    .SET(GND),
    .RST(GND),
    .O(\fsm/state [2])
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y31" ))
  \fsm/state<2>/DYMUX  (
    .I(\fsm/state_mux0000[4] ),
    .O(\fsm/state<2>/DYMUX_3704 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y31" ))
  \fsm/state<2>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\fsm/state<2>/CLKINV_3696 )
  );
  X_LUT4 #(
    .INIT ( 16'hF232 ),
    .LOC ( "SLICE_X13Y31" ))
  \fsm/state_mux0000<4>  (
    .ADR0(N23),
    .ADR1(N12_0),
    .ADR2(\fsm/state [1]),
    .ADR3(\conterWR/time_ended_o_964 ),
    .O(\fsm/state_mux0000[4] )
  );
  X_LUT4 #(
    .INIT ( 16'hC000 ),
    .LOC ( "SLICE_X14Y25" ))
  \fsm/state_mux0000<2>191  (
    .ADR0(VCC),
    .ADR1(\conterWR/time_ended_o_964 ),
    .ADR2(\fsm/state [3]),
    .ADR3(N7_0),
    .O(\fsm/state_mux0000<2>19 )
  );
  X_SFF #(
    .LOC ( "SLICE_X14Y25" ),
    .INIT ( 1'b1 ))
  \fsm/state_4  (
    .I(\fsm/state<4>/DYMUX_3724 ),
    .CE(VCC),
    .CLK(\fsm/state<4>/CLKINV_3714 ),
    .SET(GND),
    .RST(GND),
    .SSET(\fsm/state<4>/SRINV_3715 ),
    .SRST(GND),
    .O(\fsm/state [4])
  );
  X_BUF #(
    .LOC ( "SLICE_X14Y25" ))
  \fsm/state<4>/DYMUX  (
    .I(\fsm/state_mux0000<2>19 ),
    .O(\fsm/state<4>/DYMUX_3724 )
  );
  X_BUF #(
    .LOC ( "SLICE_X14Y25" ))
  \fsm/state<4>/SRINV  (
    .I(\fsm/state_mux0000<2>15_2723 ),
    .O(\fsm/state<4>/SRINV_3715 )
  );
  X_BUF #(
    .LOC ( "SLICE_X14Y25" ))
  \fsm/state<4>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\fsm/state<4>/CLKINV_3714 )
  );
  X_FF #(
    .LOC ( "SLICE_X13Y28" ),
    .INIT ( 1'b0 ))
  \fsm/state_6  (
    .I(\fsm/state<6>/DYMUX_3743 ),
    .CE(VCC),
    .CLK(\fsm/state<6>/CLKINV_3735 ),
    .SET(GND),
    .RST(GND),
    .O(\fsm/state [6])
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y28" ))
  \fsm/state<6>/DYMUX  (
    .I(\fsm/state_mux0000[0] ),
    .O(\fsm/state<6>/DYMUX_3743 )
  );
  X_BUF #(
    .LOC ( "SLICE_X13Y28" ))
  \fsm/state<6>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\fsm/state<6>/CLKINV_3735 )
  );
  X_LUT4 #(
    .INIT ( 16'h50DC ),
    .LOC ( "SLICE_X13Y28" ))
  \fsm/state_mux0000<0>  (
    .ADR0(rst_i_IBUF_942),
    .ADR1(\fsm/state_mux0000<2>0_0 ),
    .ADR2(\fsm/state [6]),
    .ADR3(N7_0),
    .O(\fsm/state_mux0000[0] )
  );
  X_LUT4 #(
    .INIT ( 16'hFE33 ),
    .LOC ( "SLICE_X21Y31" ))
  \data_io<7>_MLTSRCEDGELogicTrst1  (
    .ADR0(\memory/_varindex0000<7>_0 ),
    .ADR1(\fsm/output_enable_o_932 ),
    .ADR2(N47),
    .ADR3(\fsm/write_enable_o_931 ),
    .O(\data_io<7>_MLTSRCEDGE )
  );
  X_BUF #(
    .LOC ( "SLICE_X14Y27" ))
  \fsm/state_mux0000<3>7/XUSED  (
    .I(\fsm/state_mux0000<3>7_3768 ),
    .O(\fsm/state_mux0000<3>7_0 )
  );
  X_LUT4 #(
    .INIT ( 16'hCCAA ),
    .LOC ( "SLICE_X14Y27" ))
  \fsm/state_mux0000<3>7  (
    .ADR0(\fsm/state [4]),
    .ADR1(\fsm/state [2]),
    .ADR2(VCC),
    .ADR3(\fsm/state_cmp_eq0013 ),
    .O(\fsm/state_mux0000<3>7_3768 )
  );
  X_LUT4 #(
    .INIT ( 16'h7733 ),
    .LOC ( "SLICE_X14Y31" ))
  \conterWR/time_ended_o_not00011  (
    .ADR0(\conterWR/counter [0]),
    .ADR1(\fsm/write_read_o_1054 ),
    .ADR2(VCC),
    .ADR3(\conterWR/counter [1]),
    .O(\conterWR/time_ended_o_not0001 )
  );
  X_LUT4 #(
    .INIT ( 16'hFCFC ),
    .LOC ( "SLICE_X10Y23" ))
  \divider/hz_enable_clk_o_not00011  (
    .ADR0(VCC),
    .ADR1(\divider/hz_enable_clk_o_953 ),
    .ADR2(\divider/counter_cmp_eq0000 ),
    .ADR3(VCC),
    .O(\divider/hz_enable_clk_o_not0001 )
  );
  X_BUF #(
    .LOC ( "SLICE_X16Y31" ))
  \conterWR/time_ended_o/FFY/RSTOR  (
    .I(rst_i_IBUF_942),
    .O(\conterWR/time_ended_o/FFY/RST )
  );
  X_FF #(
    .LOC ( "SLICE_X16Y31" ),
    .INIT ( 1'b0 ))
  \conterWR/time_ended_o  (
    .I(\conterWR/time_ended_o/DYMUX_3804 ),
    .CE(\conterWR/time_ended_o/CEINV_3800 ),
    .CLK(\conterWR/time_ended_o/CLKINV_3801 ),
    .SET(GND),
    .RST(\conterWR/time_ended_o/FFY/RST ),
    .O(\conterWR/time_ended_o_964 )
  );
  X_BUF #(
    .LOC ( "SLICE_X16Y31" ))
  \conterWR/time_ended_o/DYMUX  (
    .I(\fsm/write_read_o_1054 ),
    .O(\conterWR/time_ended_o/DYMUX_3804 )
  );
  X_BUF #(
    .LOC ( "SLICE_X16Y31" ))
  \conterWR/time_ended_o/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\conterWR/time_ended_o/CLKINV_3801 )
  );
  X_BUF #(
    .LOC ( "SLICE_X16Y31" ))
  \conterWR/time_ended_o/CEINV  (
    .I(\conterWR/time_ended_o_not0001 ),
    .O(\conterWR/time_ended_o/CEINV_3800 )
  );
  X_BUF #(
    .LOC ( "SLICE_X11Y22" ))
  \divider/hz_enable_clk_o/FFY/RSTOR  (
    .I(rst_i_IBUF_942),
    .O(\divider/hz_enable_clk_o/FFY/RST )
  );
  X_FF #(
    .LOC ( "SLICE_X11Y22" ),
    .INIT ( 1'b0 ))
  \divider/hz_enable_clk_o  (
    .I(\divider/hz_enable_clk_o/DYMUX_3821 ),
    .CE(\divider/hz_enable_clk_o/CEINV_3817 ),
    .CLK(\divider/hz_enable_clk_o/CLKINV_3818 ),
    .SET(GND),
    .RST(\divider/hz_enable_clk_o/FFY/RST ),
    .O(\divider/hz_enable_clk_o_953 )
  );
  X_INV #(
    .LOC ( "SLICE_X11Y22" ))
  \divider/hz_enable_clk_o/DYMUX  (
    .I(\divider/hz_enable_clk_o_953 ),
    .O(\divider/hz_enable_clk_o/DYMUX_3821 )
  );
  X_BUF #(
    .LOC ( "SLICE_X11Y22" ))
  \divider/hz_enable_clk_o/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\divider/hz_enable_clk_o/CLKINV_3818 )
  );
  X_BUF #(
    .LOC ( "SLICE_X11Y22" ))
  \divider/hz_enable_clk_o/CEINV  (
    .I(\divider/hz_enable_clk_o_not0001 ),
    .O(\divider/hz_enable_clk_o/CEINV_3817 )
  );
  X_LUT4 #(
    .INIT ( 16'hFEF0 ),
    .LOC ( "SLICE_X18Y31" ))
  \fsm/segment1_o_cmp_gt00001  (
    .ADR0(N52),
    .ADR1(N53),
    .ADR2(N36),
    .ADR3(N51),
    .O(\fsm/segment1_o_cmp_gt0000 )
  );
  X_BUF #(
    .LOC ( "SLICE_X18Y31" ))
  \fsm/segment1_o_cmp_gt0000/XUSED  (
    .I(\fsm/segment1_o_cmp_gt0000 ),
    .O(\fsm/segment1_o_cmp_gt0000_0 )
  );
  X_BUF #(
    .LOC ( "SLICE_X18Y31" ))
  \fsm/segment1_o_cmp_gt0000/YUSED  (
    .I(N36_pack_1),
    .O(N36)
  );
  X_LUT4 #(
    .INIT ( 16'hFFFE ),
    .LOC ( "SLICE_X18Y31" ))
  \fsm/segment1_o_cmp_gt00001_SW0  (
    .ADR0(N49),
    .ADR1(N48),
    .ADR2(N47),
    .ADR3(N50),
    .O(N36_pack_1)
  );
  X_RAMD16 #(
    .INIT ( 16'h0000 ),
    .LOC ( "SLICE_X18Y30" ))
  \memory/Mram_memory4  (
    .RADR0(\NlwBufferSignal_memory/Mram_memory4/RADR1 ),
    .RADR1(\NlwBufferSignal_memory/Mram_memory4/RADR2 ),
    .RADR2(\NlwBufferSignal_memory/Mram_memory4/RADR3 ),
    .RADR3(\NlwBufferSignal_memory/Mram_memory4/RADR4 ),
    .WADR0(\NlwBufferSignal_memory/Mram_memory4/WADR1 ),
    .WADR1(\NlwBufferSignal_memory/Mram_memory4/WADR2 ),
    .WADR2(\NlwBufferSignal_memory/Mram_memory4/WADR3 ),
    .WADR3(\NlwBufferSignal_memory/Mram_memory4/WADR4 ),
    .I(\memory/_varindex0000<4>/DIG_MUX_3875 ),
    .CLK(\memory/_varindex0000<4>/CLKINV_3873 ),
    .WE(\memory/_varindex0000<4>/SRINV_3867 ),
    .O(\memory/_varindex0000 [3])
  );
  X_RAMD16 #(
    .INIT ( 16'h0000 ),
    .LOC ( "SLICE_X18Y30" ))
  \memory/Mram_memory5  (
    .RADR0(\NlwBufferSignal_memory/Mram_memory5/RADR1 ),
    .RADR1(\NlwBufferSignal_memory/Mram_memory5/RADR2 ),
    .RADR2(\NlwBufferSignal_memory/Mram_memory5/RADR3 ),
    .RADR3(\NlwBufferSignal_memory/Mram_memory5/RADR4 ),
    .WADR0(\NlwBufferSignal_memory/Mram_memory5/WADR1 ),
    .WADR1(\NlwBufferSignal_memory/Mram_memory5/WADR2 ),
    .WADR2(\NlwBufferSignal_memory/Mram_memory5/WADR3 ),
    .WADR3(\NlwBufferSignal_memory/Mram_memory5/WADR4 ),
    .I(\memory/_varindex0000<4>/DIF_MUX_3891 ),
    .CLK(\memory/_varindex0000<4>/CLKINV_3873 ),
    .WE(\memory/_varindex0000<4>/SRINV_3867 ),
    .O(\memory/_varindex0000 [4])
  );
  X_BUF #(
    .LOC ( "SLICE_X18Y30" ))
  \memory/_varindex0000<4>/XUSED  (
    .I(\memory/_varindex0000 [4]),
    .O(\memory/_varindex0000<4>_0 )
  );
  X_BUF #(
    .LOC ( "SLICE_X18Y30" ))
  \memory/_varindex0000<4>/DIF_MUX  (
    .I(N50),
    .O(\memory/_varindex0000<4>/DIF_MUX_3891 )
  );
  X_BUF #(
    .LOC ( "SLICE_X18Y30" ))
  \memory/_varindex0000<4>/YUSED  (
    .I(\memory/_varindex0000 [3]),
    .O(\memory/_varindex0000<3>_0 )
  );
  X_BUF #(
    .LOC ( "SLICE_X18Y30" ))
  \memory/_varindex0000<4>/DIG_MUX  (
    .I(N51),
    .O(\memory/_varindex0000<4>/DIG_MUX_3875 )
  );
  X_BUF #(
    .LOC ( "SLICE_X18Y30" ))
  \memory/_varindex0000<4>/SRINV  (
    .I(\memory/_and0000_0 ),
    .O(\memory/_varindex0000<4>/SRINV_3867 )
  );
  X_BUF #(
    .LOC ( "SLICE_X18Y30" ))
  \memory/_varindex0000<4>/CLKINV  (
    .I(clk_i_BUFGP),
    .O(\memory/_varindex0000<4>/CLKINV_3873 )
  );
  X_RAMD16 #(
    .INIT ( 16'h0000 ),
    .LOC ( "SLICE_X18Y28" ))
  \memory/Mram_memory6  (
    .RADR0(\NlwBufferSignal_memory/Mram_memory6/RADR1 ),
    .RADR1(\NlwBufferSignal_memory/Mram_memory6/RADR2 ),
    .RADR2(\fsm/address_o [2]),
    .RADR3(\NlwBufferSignal_memory/Mram_memory6/RADR4 ),
    .WADR0(\NlwBufferSignal_memory/Mram_memory6/WADR1 ),
    .WADR1(\NlwBufferSignal_memory/Mram_memory6/WADR2 ),
    .WADR2(\fsm/address_o [2]),
    .WADR3(\NlwBufferSignal_memory/Mram_memory6/WADR4 ),
    .I(\memory/_varindex0000<0>/DIG_MUX_1099 ),
    .CLK(\memory/_varindex0000<0>/CLKINV_1097 ),
    .WE(\memory/_varindex0000<0>/SRINV_1091 ),
    .O(\memory/_varindex0000 [5])
  );
  X_RAMD16 #(
    .INIT ( 16'h0000 ),
    .LOC ( "SLICE_X18Y28" ))
  \memory/Mram_memory1  (
    .RADR0(\NlwBufferSignal_memory/Mram_memory1/RADR1 ),
    .RADR1(\NlwBufferSignal_memory/Mram_memory1/RADR2 ),
    .RADR2(\fsm/address_o [2]),
    .RADR3(\NlwBufferSignal_memory/Mram_memory1/RADR4 ),
    .WADR0(\NlwBufferSignal_memory/Mram_memory1/WADR1 ),
    .WADR1(\NlwBufferSignal_memory/Mram_memory1/WADR2 ),
    .WADR2(\fsm/address_o [2]),
    .WADR3(\NlwBufferSignal_memory/Mram_memory1/WADR4 ),
    .I(\memory/_varindex0000<0>/DIF_MUX_1115 ),
    .CLK(\memory/_varindex0000<0>/CLKINV_1097 ),
    .WE(\memory/_varindex0000<0>/SRINV_1091 ),
    .O(\memory/_varindex0000 [0])
  );
  X_RAMD16 #(
    .INIT ( 16'h0000 ),
    .LOC ( "SLICE_X20Y30" ))
  \memory/Mram_memory7  (
    .RADR0(\NlwBufferSignal_memory/Mram_memory7/RADR1 ),
    .RADR1(\NlwBufferSignal_memory/Mram_memory7/RADR2 ),
    .RADR2(\NlwBufferSignal_memory/Mram_memory7/RADR3 ),
    .RADR3(\NlwBufferSignal_memory/Mram_memory7/RADR4 ),
    .WADR0(\NlwBufferSignal_memory/Mram_memory7/WADR1 ),
    .WADR1(\NlwBufferSignal_memory/Mram_memory7/WADR2 ),
    .WADR2(\NlwBufferSignal_memory/Mram_memory7/WADR3 ),
    .WADR3(\NlwBufferSignal_memory/Mram_memory7/WADR4 ),
    .I(\memory/_varindex0000<1>/DIG_MUX_1152 ),
    .CLK(\memory/_varindex0000<1>/CLKINV_1150 ),
    .WE(\memory/_varindex0000<1>/SRINV_1144 ),
    .O(\memory/_varindex0000 [6])
  );
  X_RAMD16 #(
    .INIT ( 16'h0000 ),
    .LOC ( "SLICE_X20Y30" ))
  \memory/Mram_memory2  (
    .RADR0(\NlwBufferSignal_memory/Mram_memory2/RADR1 ),
    .RADR1(\NlwBufferSignal_memory/Mram_memory2/RADR2 ),
    .RADR2(\NlwBufferSignal_memory/Mram_memory2/RADR3 ),
    .RADR3(\NlwBufferSignal_memory/Mram_memory2/RADR4 ),
    .WADR0(\NlwBufferSignal_memory/Mram_memory2/WADR1 ),
    .WADR1(\NlwBufferSignal_memory/Mram_memory2/WADR2 ),
    .WADR2(\NlwBufferSignal_memory/Mram_memory2/WADR3 ),
    .WADR3(\NlwBufferSignal_memory/Mram_memory2/WADR4 ),
    .I(\memory/_varindex0000<1>/DIF_MUX_1168 ),
    .CLK(\memory/_varindex0000<1>/CLKINV_1150 ),
    .WE(\memory/_varindex0000<1>/SRINV_1144 ),
    .O(\memory/_varindex0000 [1])
  );
  X_RAMD16 #(
    .INIT ( 16'h0000 ),
    .LOC ( "SLICE_X20Y31" ))
  \memory/Mram_memory8  (
    .RADR0(\NlwBufferSignal_memory/Mram_memory8/RADR1 ),
    .RADR1(\NlwBufferSignal_memory/Mram_memory8/RADR2 ),
    .RADR2(\NlwBufferSignal_memory/Mram_memory8/RADR3 ),
    .RADR3(\NlwBufferSignal_memory/Mram_memory8/RADR4 ),
    .WADR0(\NlwBufferSignal_memory/Mram_memory8/WADR1 ),
    .WADR1(\NlwBufferSignal_memory/Mram_memory8/WADR2 ),
    .WADR2(\NlwBufferSignal_memory/Mram_memory8/WADR3 ),
    .WADR3(\NlwBufferSignal_memory/Mram_memory8/WADR4 ),
    .I(\memory/_varindex0000<2>/DIG_MUX_1205 ),
    .CLK(\memory/_varindex0000<2>/CLKINV_1203 ),
    .WE(\memory/_varindex0000<2>/SRINV_1197 ),
    .O(\memory/_varindex0000 [7])
  );
  X_RAMD16 #(
    .INIT ( 16'h0000 ),
    .LOC ( "SLICE_X20Y31" ))
  \memory/Mram_memory3  (
    .RADR0(\NlwBufferSignal_memory/Mram_memory3/RADR1 ),
    .RADR1(\NlwBufferSignal_memory/Mram_memory3/RADR2 ),
    .RADR2(\NlwBufferSignal_memory/Mram_memory3/RADR3 ),
    .RADR3(\NlwBufferSignal_memory/Mram_memory3/RADR4 ),
    .WADR0(\NlwBufferSignal_memory/Mram_memory3/WADR1 ),
    .WADR1(\NlwBufferSignal_memory/Mram_memory3/WADR2 ),
    .WADR2(\NlwBufferSignal_memory/Mram_memory3/WADR3 ),
    .WADR3(\NlwBufferSignal_memory/Mram_memory3/WADR4 ),
    .I(\memory/_varindex0000<2>/DIF_MUX_1221 ),
    .CLK(\memory/_varindex0000<2>/CLKINV_1203 ),
    .WE(\memory/_varindex0000<2>/SRINV_1197 ),
    .O(\memory/_varindex0000 [2])
  );
  X_FF #(
    .LOC ( "SLICE_X19Y26" ),
    .INIT ( 1'b0 ))
  \fsm/address_o_2  (
    .I(\fsm/address_o<3>/DYMUX_1243 ),
    .CE(VCC),
    .CLK(\fsm/address_o<3>/CLKINV_1241 ),
    .SET(GND),
    .RST(GND),
    .O(\fsm/address_o [2])
  );
  X_FF #(
    .LOC ( "SLICE_X19Y26" ),
    .INIT ( 1'b0 ))
  \fsm/address_o_3  (
    .I(\fsm/address_o<3>/DXMUX_1248 ),
    .CE(VCC),
    .CLK(\fsm/address_o<3>/CLKINV_1241 ),
    .SET(GND),
    .RST(GND),
    .O(\fsm/address_o [3])
  );
  X_LUT4 #(
    .INIT ( 16'hF0EF ),
    .LOC ( "SLICE_X19Y28" ))
  \data_io<5>_MLTSRCEDGELogicTrst1  (
    .ADR0(\memory/_varindex0000<5>_0 ),
    .ADR1(N49),
    .ADR2(\fsm/write_enable_o_931 ),
    .ADR3(\fsm/output_enable_o_932 ),
    .O(\data_io<5>_MLTSRCEDGE )
  );
  X_LUT4 #(
    .INIT ( 16'hF00F ),
    .LOC ( "SLICE_X19Y28" ))
  N101 (
    .ADR0(VCC),
    .ADR1(VCC),
    .ADR2(\fsm/write_enable_o_931 ),
    .ADR3(\fsm/output_enable_o_932 ),
    .O(N10)
  );
  X_LUT4 #(
    .INIT ( 16'hFFA0 ),
    .LOC ( "SLICE_X15Y28" ))
  \fsm/segment1_o_mux0000<3>2  (
    .ADR0(N5_0),
    .ADR1(VCC),
    .ADR2(\fsm/segment1_o [3]),
    .ADR3(\fsm/state [5]),
    .O(\fsm/segment1_o_mux0000<3>2_1289 )
  );
  X_LUT4 #(
    .INIT ( 16'hECEC ),
    .LOC ( "SLICE_X15Y28" ))
  \fsm/segment1_o_mux0000<1>_SW0  (
    .ADR0(N5_0),
    .ADR1(\fsm/state [6]),
    .ADR2(\fsm/segment1_o [1]),
    .ADR3(VCC),
    .O(N261)
  );
  X_LUT4 #(
    .INIT ( 16'h3300 ),
    .LOC ( "SLICE_X15Y26" ))
  \fsm/state_mux0000<2>11  (
    .ADR0(VCC),
    .ADR1(rst_i_IBUF_942),
    .ADR2(VCC),
    .ADR3(\fsm/state [4]),
    .O(\fsm/state_mux0000<2>11_1312 )
  );
  X_LUT4 #(
    .INIT ( 16'h3300 ),
    .LOC ( "SLICE_X15Y26" ))
  \fsm/state_mux0000<3>21  (
    .ADR0(VCC),
    .ADR1(rst_i_IBUF_942),
    .ADR2(VCC),
    .ADR3(\fsm/state [3]),
    .O(\fsm/state_mux0000<3>21_1321 )
  );
  X_LUT4 #(
    .INIT ( 16'h8421 ),
    .LOC ( "SLICE_X19Y29" ))
  \fsm/state_mux0000<2>2144_SW0  (
    .ADR0(N51),
    .ADR1(N52),
    .ADR2(\fsm/address_o_3_1_949 ),
    .ADR3(\fsm/address_o_2_1_950 ),
    .O(N63)
  );
  X_LUT4 #(
    .INIT ( 16'hC3C4 ),
    .LOC ( "SLICE_X19Y29" ))
  \fsm/segment1_o_mux0000<2>_SW2  (
    .ADR0(N51),
    .ADR1(N52),
    .ADR2(N53),
    .ADR3(N36),
    .O(N65)
  );
  X_LUT4 #(
    .INIT ( 16'hFAFA ),
    .LOC ( "SLICE_X14Y29" ))
  \fsm/state_mux0000<2>111  (
    .ADR0(\fsm/state [5]),
    .ADR1(VCC),
    .ADR2(\fsm/state [6]),
    .ADR3(VCC),
    .O(N22_pack_1)
  );
  X_LUT4 #(
    .INIT ( 16'hF5F4 ),
    .LOC ( "SLICE_X14Y29" ))
  \fsm/state_mux0000<6>111  (
    .ADR0(\divider/hz_enable_clk_o_953 ),
    .ADR1(\fsm/state [2]),
    .ADR2(N22),
    .ADR3(\fsm/state [4]),
    .O(N24)
  );
  X_LUT4 #(
    .INIT ( 16'h33CC ),
    .LOC ( "SLICE_X16Y30" ))
  \fsm/Mrom_data_to_write_mux0000111  (
    .ADR0(VCC),
    .ADR1(value_write_i_1_IBUF_959),
    .ADR2(VCC),
    .ADR3(value_write_i_0_IBUF_957),
    .O(\fsm/Mrom_data_to_write_mux00001 )
  );
  X_FF #(
    .LOC ( "SLICE_X16Y30" ),
    .INIT ( 1'b0 ))
  \fsm/data_to_write_3  (
    .I(\fsm/data_to_write<2>/DYMUX_1390 ),
    .CE(\fsm/data_to_write<2>/CEINV_1379 ),
    .CLK(\fsm/data_to_write<2>/CLKINV_1380 ),
    .SET(GND),
    .RST(GND),
    .O(\fsm/data_to_write [3])
  );
  X_FF #(
    .LOC ( "SLICE_X16Y30" ),
    .INIT ( 1'b0 ))
  \fsm/data_to_write_2  (
    .I(\fsm/data_to_write<2>/DXMUX_1396 ),
    .CE(\fsm/data_to_write<2>/CEINV_1379 ),
    .CLK(\fsm/data_to_write<2>/CLKINV_1380 ),
    .SET(GND),
    .RST(GND),
    .O(\fsm/data_to_write [2])
  );
  X_LUT4 #(
    .INIT ( 16'h9009 ),
    .LOC ( "SLICE_X16Y29" ))
  \fsm/state_mux0000<2>226  (
    .ADR0(N54),
    .ADR1(\fsm/data_to_write [2]),
    .ADR2(N53),
    .ADR3(\fsm/data_to_write [3]),
    .O(\fsm/state_mux0000<2>226_1415 )
  );
  X_LUT4 #(
    .INIT ( 16'h8241 ),
    .LOC ( "SLICE_X16Y29" ))
  \fsm/state_mux0000<2>2107  (
    .ADR0(N54),
    .ADR1(N53),
    .ADR2(\fsm/address_o [1]),
    .ADR3(\fsm/address_o [0]),
    .O(\fsm/state_mux0000<2>2107_1422 )
  );
  X_LUT4 #(
    .INIT ( 16'hC0C0 ),
    .LOC ( "SLICE_X14Y24" ))
  \fsm/state_mux0000<0>_SW0  (
    .ADR0(VCC),
    .ADR1(\conterWR/time_ended_o_964 ),
    .ADR2(\fsm/state [3]),
    .ADR3(VCC),
    .O(\fsm/state_mux0000<2>0 )
  );
  X_LUT4 #(
    .INIT ( 16'h3F0F ),
    .LOC ( "SLICE_X14Y24" ))
  \fsm/state_mux0000<2>12_SW1  (
    .ADR0(VCC),
    .ADR1(\conterWR/time_ended_o_964 ),
    .ADR2(\divider/hz_enable_clk_o_953 ),
    .ADR3(\fsm/state [3]),
    .O(N70)
  );
  X_LUT4 #(
    .INIT ( 16'hF3E3 ),
    .LOC ( "SLICE_X19Y31" ))
  \data_io<4>_MLTSRCEDGELogicTrst1  (
    .ADR0(N50),
    .ADR1(\fsm/output_enable_o_932 ),
    .ADR2(\fsm/write_enable_o_931 ),
    .ADR3(\memory/_varindex0000<4>_0 ),
    .O(\data_io<4>_MLTSRCEDGE )
  );
  X_LUT4 #(
    .INIT ( 16'h0F00 ),
    .LOC ( "SLICE_X19Y31" ))
  \memory/_and00001  (
    .ADR0(VCC),
    .ADR1(VCC),
    .ADR2(\fsm/write_enable_o_931 ),
    .ADR3(\fsm/output_enable_o_932 ),
    .O(\memory/_and0000 )
  );
  X_LUT4 #(
    .INIT ( 16'h222C ),
    .LOC ( "SLICE_X14Y28" ))
  \fsm/segment1_o_mux0000<3>35  (
    .ADR0(N36),
    .ADR1(N51),
    .ADR2(N52),
    .ADR3(N53),
    .O(\fsm/segment1_o_mux0000<3>35_pack_1 )
  );
  X_LUT4 #(
    .INIT ( 16'hA808 ),
    .LOC ( "SLICE_X14Y28" ))
  \fsm/segment1_o_mux0000<3>481  (
    .ADR0(\fsm/segment1_o_mux0000<3>35_970 ),
    .ADR1(\fsm/state [3]),
    .ADR2(\conterWR/time_ended_o_964 ),
    .ADR3(\fsm/state [1]),
    .O(\fsm/segment1_o_mux0000<3>48 )
  );
  X_SFF #(
    .LOC ( "SLICE_X14Y28" ),
    .INIT ( 1'b1 ))
  \fsm/segment1_o_3  (
    .I(\fsm/segment1_o<3>/DXMUX_1501 ),
    .CE(VCC),
    .CLK(\fsm/segment1_o<3>/CLKINV_1485 ),
    .SET(GND),
    .RST(GND),
    .SSET(\fsm/segment1_o<3>/SRINV_1486 ),
    .SRST(GND),
    .O(\fsm/segment1_o [3])
  );
  X_LUT4 #(
    .INIT ( 16'h0001 ),
    .LOC ( "SLICE_X19Y30" ))
  \fsm/state_cmp_eq0011811  (
    .ADR0(N50),
    .ADR1(N47),
    .ADR2(N48),
    .ADR3(N49),
    .O(N26)
  );
  X_LUT4 #(
    .INIT ( 16'hAAFD ),
    .LOC ( "SLICE_X19Y30" ))
  \data_io<6>_MLTSRCEDGELogicTrst1  (
    .ADR0(\fsm/write_enable_o_931 ),
    .ADR1(\memory/_varindex0000<6>_0 ),
    .ADR2(N48),
    .ADR3(\fsm/output_enable_o_932 ),
    .O(\data_io<6>_MLTSRCEDGE )
  );
  X_LUT4 #(
    .INIT ( 16'hFF55 ),
    .LOC ( "SLICE_X12Y31" ))
  \fsm/state_mux0000<4>_SW0  (
    .ADR0(\fsm/state [2]),
    .ADR1(VCC),
    .ADR2(VCC),
    .ADR3(rst_i_IBUF_942),
    .O(N12)
  );
  X_LUT4 #(
    .INIT ( 16'hAA00 ),
    .LOC ( "SLICE_X12Y31" ))
  \fsm/data_to_write_not00011  (
    .ADR0(rst_i_IBUF_942),
    .ADR1(VCC),
    .ADR2(VCC),
    .ADR3(\fsm/state [0]),
    .O(\fsm/data_to_write_not0001 )
  );
  X_LUT4 #(
    .INIT ( 16'h0F0F ),
    .LOC ( "SLICE_X13Y16" ))
  \divider/Mcount_counter_lut<0>_INV_0  (
    .ADR0(VCC),
    .ADR1(VCC),
    .ADR2(\divider/counter [0]),
    .ADR3(VCC),
    .O(\divider/Mcount_counter_lut [0])
  );
  X_LUT4 #(
    .INIT ( 16'hAAAA ),
    .LOC ( "SLICE_X13Y27" ))
  \divider/counter<23>_rt  (
    .ADR0(\divider/counter [23]),
    .ADR1(VCC),
    .ADR2(VCC),
    .ADR3(VCC),
    .O(\divider/counter<23>_rt_1982 )
  );
  X_LUT4 #(
    .INIT ( 16'h0004 ),
    .LOC ( "SLICE_X12Y20" ))
  \divider/counter_cmp_eq0000_wg_lut<1>  (
    .ADR0(\divider/counter [9]),
    .ADR1(\divider/counter [11]),
    .ADR2(\divider/counter [10]),
    .ADR3(\divider/counter [3]),
    .O(\divider/counter_cmp_eq0000_wg_lut [1])
  );
  X_LUT4 #(
    .INIT ( 16'h0040 ),
    .LOC ( "SLICE_X12Y20" ))
  \divider/counter_cmp_eq0000_wg_lut<0>  (
    .ADR0(\divider/counter [4]),
    .ADR1(\divider/counter [7]),
    .ADR2(\divider/counter [6]),
    .ADR3(\divider/counter [8]),
    .O(\divider/counter_cmp_eq0000_wg_lut [0])
  );
  X_LUT4 #(
    .INIT ( 16'h4000 ),
    .LOC ( "SLICE_X12Y21" ))
  \divider/counter_cmp_eq0000_wg_lut<3>  (
    .ADR0(\divider/counter [1]),
    .ADR1(\divider/counter [15]),
    .ADR2(\divider/counter [16]),
    .ADR3(\divider/counter [17]),
    .O(\divider/counter_cmp_eq0000_wg_lut [3])
  );
  X_LUT4 #(
    .INIT ( 16'h1000 ),
    .LOC ( "SLICE_X12Y21" ))
  \divider/counter_cmp_eq0000_wg_lut<2>  (
    .ADR0(\divider/counter [13]),
    .ADR1(\divider/counter [5]),
    .ADR2(\divider/counter [12]),
    .ADR3(\divider/counter [14]),
    .O(\divider/counter_cmp_eq0000_wg_lut [2])
  );
  X_LUT4 #(
    .INIT ( 16'h0040 ),
    .LOC ( "SLICE_X12Y22" ))
  \divider/counter_cmp_eq0000_wg_lut<5>  (
    .ADR0(\divider/counter [22]),
    .ADR1(\divider/counter [21]),
    .ADR2(\divider/counter [23]),
    .ADR3(\divider/counter [2]),
    .O(\divider/counter_cmp_eq0000_wg_lut [5])
  );
  X_LUT4 #(
    .INIT ( 16'h0010 ),
    .LOC ( "SLICE_X12Y22" ))
  \divider/counter_cmp_eq0000_wg_lut<4>  (
    .ADR0(\divider/counter [19]),
    .ADR1(\divider/counter [20]),
    .ADR2(\divider/counter [18]),
    .ADR3(\divider/counter [0]),
    .O(\divider/counter_cmp_eq0000_wg_lut [4])
  );
  X_BUF #(
    .LOC ( "PAD16" ))
  \value_write_i<0>/IFF/IMUX  (
    .I(\value_write_i<0>/INBUF ),
    .O(value_write_i_0_IBUF_957)
  );
  X_BUF #(
    .LOC ( "PAD13" ))
  \value_write_i<1>/IFF/IMUX  (
    .I(\value_write_i<1>/INBUF ),
    .O(value_write_i_1_IBUF_959)
  );
  X_BUF #(
    .LOC ( "PAD11" ))
  \rst_i/IFF/IMUX  (
    .I(\rst_i/INBUF ),
    .O(rst_i_IBUF_942)
  );
  X_BUF #(
    .LOC ( "PAD33" ))
  \data_io<0>/IFF/IMUX  (
    .I(\data_io<0>/INBUF ),
    .O(N54)
  );
  X_BUF #(
    .LOC ( "PAD34" ))
  \data_io<1>/IFF/IMUX  (
    .I(\data_io<1>/INBUF ),
    .O(N53)
  );
  X_BUF #(
    .LOC ( "PAD26" ))
  \data_io<2>/IFF/IMUX  (
    .I(\data_io<2>/INBUF ),
    .O(N52)
  );
  X_BUF #(
    .LOC ( "PAD23" ))
  \data_io<3>/IFF/IMUX  (
    .I(\data_io<3>/INBUF ),
    .O(N51)
  );
  X_BUF #(
    .LOC ( "PAD24" ))
  \data_io<4>/IFF/IMUX  (
    .I(\data_io<4>/INBUF ),
    .O(N50)
  );
  X_BUF #(
    .LOC ( "PAD25" ))
  \data_io<5>/IFF/IMUX  (
    .I(\data_io<5>/INBUF ),
    .O(N49)
  );
  X_BUF #(
    .LOC ( "PAD27" ))
  \data_io<6>/IFF/IMUX  (
    .I(\data_io<6>/INBUF ),
    .O(N48)
  );
  X_BUF #(
    .LOC ( "PAD28" ))
  \data_io<7>/IFF/IMUX  (
    .I(\data_io<7>/INBUF ),
    .O(N47)
  );
  X_LUT4 #(
    .INIT ( 16'hEF40 ),
    .LOC ( "SLICE_X12Y30" ))
  \fsm/segment2_o_mux00001_F  (
    .ADR0(\conterWR/time_ended_o_964 ),
    .ADR1(\fsm/segment1_o_cmp_gt0000_0 ),
    .ADR2(\fsm/state [3]),
    .ADR3(\fsm/segment2_o_1040 ),
    .O(N72)
  );
  X_LUT4 #(
    .INIT ( 16'hFDC8 ),
    .LOC ( "SLICE_X12Y30" ))
  \fsm/segment2_o_mux00001_G  (
    .ADR0(\conterWR/time_ended_o_964 ),
    .ADR1(\fsm/segment1_o_cmp_gt0000_0 ),
    .ADR2(\fsm/state [3]),
    .ADR3(\fsm/segment2_o_1040 ),
    .O(N73)
  );
  X_SFF #(
    .LOC ( "SLICE_X12Y30" ),
    .INIT ( 1'b1 ))
  \fsm/segment2_o  (
    .I(\fsm/segment2_o/DXMUX_2420 ),
    .CE(VCC),
    .CLK(\fsm/segment2_o/CLKINV_2403 ),
    .SET(GND),
    .RST(GND),
    .SSET(\fsm/segment2_o/SRINV_2404 ),
    .SRST(GND),
    .O(\fsm/segment2_o_1040 )
  );
  X_LUT4 #(
    .INIT ( 16'hBAFF ),
    .LOC ( "SLICE_X21Y28" ))
  \data_io<0>_MLTSRCEDGELogicTrst2  (
    .ADR0(\fsm/data_to_write [2]),
    .ADR1(\fsm/data_to_write [3]),
    .ADR2(\fsm/address_o [0]),
    .ADR3(\fsm/output_enable_o_932 ),
    .O(\data_io<0>_MLTSRCEDGELogicTrst1_2438 )
  );
  X_LUT4 #(
    .INIT ( 16'hFFEE ),
    .LOC ( "SLICE_X21Y28" ))
  \data_io<0>_MLTSRCEDGELogicTrst1  (
    .ADR0(N54),
    .ADR1(\memory/_varindex0000<0>_0 ),
    .ADR2(VCC),
    .ADR3(\fsm/output_enable_o_932 ),
    .O(\data_io<0>_MLTSRCEDGELogicTrst )
  );
  X_LUT4 #(
    .INIT ( 16'hF5FD ),
    .LOC ( "SLICE_X20Y29" ))
  \data_io<1>_MLTSRCEDGELogicTrst2  (
    .ADR0(\fsm/output_enable_o_932 ),
    .ADR1(\fsm/address_o [1]),
    .ADR2(\fsm/data_to_write [3]),
    .ADR3(\fsm/data_to_write [2]),
    .O(\data_io<1>_MLTSRCEDGELogicTrst1_2463 )
  );
  X_LUT4 #(
    .INIT ( 16'hFFEE ),
    .LOC ( "SLICE_X20Y29" ))
  \data_io<1>_MLTSRCEDGELogicTrst1  (
    .ADR0(\fsm/output_enable_o_932 ),
    .ADR1(\memory/_varindex0000<1>_0 ),
    .ADR2(VCC),
    .ADR3(N53),
    .O(\data_io<1>_MLTSRCEDGELogicTrst )
  );
  X_LUT4 #(
    .INIT ( 16'hF2FF ),
    .LOC ( "SLICE_X21Y30" ))
  \data_io<2>_MLTSRCEDGELogicTrst2  (
    .ADR0(\fsm/address_o [2]),
    .ADR1(\fsm/data_to_write [3]),
    .ADR2(\fsm/data_to_write [2]),
    .ADR3(\fsm/output_enable_o_932 ),
    .O(\data_io<2>_MLTSRCEDGELogicTrst1_2488 )
  );
  X_LUT4 #(
    .INIT ( 16'hFFFC ),
    .LOC ( "SLICE_X21Y30" ))
  \data_io<2>_MLTSRCEDGELogicTrst1  (
    .ADR0(VCC),
    .ADR1(\fsm/output_enable_o_932 ),
    .ADR2(\memory/_varindex0000<2>_0 ),
    .ADR3(N52),
    .O(\data_io<2>_MLTSRCEDGELogicTrst )
  );
  X_LUT4 #(
    .INIT ( 16'hCEFF ),
    .LOC ( "SLICE_X17Y31" ))
  \data_io<3>_MLTSRCEDGELogicTrst2  (
    .ADR0(\fsm/address_o [3]),
    .ADR1(\fsm/data_to_write [3]),
    .ADR2(\fsm/data_to_write [2]),
    .ADR3(\fsm/output_enable_o_932 ),
    .O(\data_io<3>_MLTSRCEDGELogicTrst1_2513 )
  );
  X_LUT4 #(
    .INIT ( 16'hFFFC ),
    .LOC ( "SLICE_X17Y31" ))
  \data_io<3>_MLTSRCEDGELogicTrst1  (
    .ADR0(VCC),
    .ADR1(\memory/_varindex0000<3>_0 ),
    .ADR2(N51),
    .ADR3(\fsm/output_enable_o_932 ),
    .O(\data_io<3>_MLTSRCEDGELogicTrst )
  );
  X_LUT4 #(
    .INIT ( 16'h2000 ),
    .LOC ( "SLICE_X17Y28" ))
  \fsm/state_mux0000<2>259_F  (
    .ADR0(\fsm/data_to_write [3]),
    .ADR1(N52),
    .ADR2(N51),
    .ADR3(N26_0),
    .O(N74)
  );
  X_LUT4 #(
    .INIT ( 16'h8400 ),
    .LOC ( "SLICE_X17Y28" ))
  \fsm/state_mux0000<2>259_G  (
    .ADR0(\fsm/data_to_write [3]),
    .ADR1(N52),
    .ADR2(N51),
    .ADR3(N26_0),
    .O(N75)
  );
  X_LUT4 #(
    .INIT ( 16'hCCCC ),
    .LOC ( "SLICE_X17Y30" ))
  \fsm/state<3>_rt  (
    .ADR0(VCC),
    .ADR1(\fsm/state [3]),
    .ADR2(VCC),
    .ADR3(VCC),
    .O(\fsm/state<3>_rt_2568 )
  );
  X_LUT4 #(
    .INIT ( 16'hFF01 ),
    .LOC ( "SLICE_X17Y30" ))
  \fsm/write_read_o_mux000011  (
    .ADR0(\fsm/state [4]),
    .ADR1(\fsm/state [2]),
    .ADR2(\fsm/state [0]),
    .ADR3(\fsm/state [3]),
    .O(\fsm/write_read_o_mux000011_2575 )
  );
  X_SFF #(
    .LOC ( "SLICE_X17Y30" ),
    .INIT ( 1'b1 ))
  \fsm/write_read_o  (
    .I(\fsm/write_read_o/DXMUX_2579 ),
    .CE(VCC),
    .CLK(\fsm/write_read_o/CLKINV_2559 ),
    .SET(GND),
    .RST(GND),
    .SSET(\fsm/write_read_o/SRINV_2560 ),
    .SRST(GND),
    .O(\fsm/write_read_o_1054 )
  );
  X_LUT4 #(
    .INIT ( 16'hA000 ),
    .LOC ( "SLICE_X16Y26" ))
  \fsm/address_o_mux0000<0>_SW0  (
    .ADR0(\fsm/address_o [2]),
    .ADR1(VCC),
    .ADR2(\fsm/address_o [0]),
    .ADR3(\fsm/address_o [1]),
    .O(\fsm/address_o_mux0000<0>_SW0/O_pack_1 )
  );
  X_LUT4 #(
    .INIT ( 16'hEA60 ),
    .LOC ( "SLICE_X16Y26" ))
  \fsm/address_o_mux0000<0>  (
    .ADR0(\fsm/address_o [3]),
    .ADR1(\fsm/address_o_mux0000<0>_SW0/O ),
    .ADR2(N9),
    .ADR3(N4),
    .O(\fsm/address_o_mux0000 [0])
  );
  X_FF #(
    .LOC ( "SLICE_X16Y26" ),
    .INIT ( 1'b0 ))
  \fsm/address_o_3_1  (
    .I(\fsm/address_o_3_1/DXMUX_2611 ),
    .CE(VCC),
    .CLK(\fsm/address_o_3_1/CLKINV_2595 ),
    .SET(GND),
    .RST(GND),
    .O(\fsm/address_o_3_1_949 )
  );
  X_LUT4 #(
    .INIT ( 16'h8888 ),
    .LOC ( "SLICE_X15Y27" ))
  \fsm/state_mux0000<1>_SW0  (
    .ADR0(\fsm/state [4]),
    .ADR1(\divider/hz_enable_clk_o_953 ),
    .ADR2(VCC),
    .ADR3(VCC),
    .O(\fsm/state_mux0000<1>_SW0/O_pack_2 )
  );
  X_LUT4 #(
    .INIT ( 16'hBA30 ),
    .LOC ( "SLICE_X15Y27" ))
  \fsm/state_mux0000<1>  (
    .ADR0(\fsm/state_cmp_eq0013 ),
    .ADR1(rst_i_IBUF_942),
    .ADR2(\fsm/state [5]),
    .ADR3(\fsm/state_mux0000<1>_SW0/O ),
    .O(\fsm/state_mux0000[1] )
  );
  X_FF #(
    .LOC ( "SLICE_X15Y27" ),
    .INIT ( 1'b0 ))
  \fsm/state_5  (
    .I(\fsm/state<5>/DXMUX_2641 ),
    .CE(VCC),
    .CLK(\fsm/state<5>/CLKINV_2624 ),
    .SET(GND),
    .RST(GND),
    .O(\fsm/state [5])
  );
  X_LUT4 #(
    .INIT ( 16'hFC0C ),
    .LOC ( "SLICE_X16Y28" ))
  \fsm/segment1_o_mux0000<1>11  (
    .ADR0(VCC),
    .ADR1(\fsm/state [3]),
    .ADR2(\conterWR/time_ended_o_964 ),
    .ADR3(\fsm/state [1]),
    .O(N11_pack_2)
  );
  X_LUT4 #(
    .INIT ( 16'hF888 ),
    .LOC ( "SLICE_X16Y28" ))
  \fsm/segment1_o_mux0000<0>1  (
    .ADR0(\fsm/segment1_o [0]),
    .ADR1(N5_0),
    .ADR2(N54),
    .ADR3(N11),
    .O(\fsm/segment1_o_mux0000<0>1_2670 )
  );
  X_SFF #(
    .LOC ( "SLICE_X16Y28" ),
    .INIT ( 1'b1 ))
  \fsm/segment1_o_0  (
    .I(\fsm/segment1_o<0>/DXMUX_2673 ),
    .CE(VCC),
    .CLK(\fsm/segment1_o<0>/CLKINV_2656 ),
    .SET(GND),
    .RST(GND),
    .SSET(\fsm/segment1_o<0>/SRINV_2657 ),
    .SRST(GND),
    .O(\fsm/segment1_o [0])
  );
  X_LUT4 #(
    .INIT ( 16'h0033 ),
    .LOC ( "SLICE_X15Y29" ))
  \fsm/segment1_o_mux0000<1>2_SW0  (
    .ADR0(VCC),
    .ADR1(\fsm/state [6]),
    .ADR2(VCC),
    .ADR3(\fsm/state [5]),
    .O(\fsm/segment1_o_mux0000<1>2_SW0/O_pack_1 )
  );
  X_LUT4 #(
    .INIT ( 16'hE7E2 ),
    .LOC ( "SLICE_X15Y29" ))
  \fsm/segment1_o_mux0000<1>2  (
    .ADR0(\fsm/state [1]),
    .ADR1(\conterWR/time_ended_o_964 ),
    .ADR2(\fsm/state [3]),
    .ADR3(\fsm/segment1_o_mux0000<1>2_SW0/O ),
    .O(N5)
  );
  X_LUT4 #(
    .INIT ( 16'hFFFE ),
    .LOC ( "SLICE_X15Y25" ))
  \fsm/state_mux0000<2>12  (
    .ADR0(\fsm/state [6]),
    .ADR1(\fsm/state [0]),
    .ADR2(\fsm/state [5]),
    .ADR3(N70_0),
    .O(N23_pack_1)
  );
  X_LUT4 #(
    .INIT ( 16'hCC08 ),
    .LOC ( "SLICE_X15Y25" ))
  \fsm/state_mux0000<2>15  (
    .ADR0(\fsm/state [1]),
    .ADR1(\fsm/state_mux0000<2>11_0 ),
    .ADR2(\conterWR/time_ended_o_964 ),
    .ADR3(N23),
    .O(\fsm/state_mux0000<2>15_2723 )
  );
  X_LUT4 #(
    .INIT ( 16'hCC00 ),
    .LOC ( "SLICE_X18Y26" ))
  \fsm/Madd_address_o_share0000_cy<1>11  (
    .ADR0(VCC),
    .ADR1(\fsm/address_o [1]),
    .ADR2(VCC),
    .ADR3(\fsm/address_o [0]),
    .O(\fsm/Madd_address_o_share0000_cy<1>11/O_pack_1 )
  );
  X_LUT4 #(
    .INIT ( 16'hB8C8 ),
    .LOC ( "SLICE_X18Y26" ))
  \fsm/address_o_mux0000<1>1  (
    .ADR0(N4),
    .ADR1(\fsm/address_o [2]),
    .ADR2(N9),
    .ADR3(\fsm/Madd_address_o_share0000_cy<1>11/O ),
    .O(\fsm/address_o_mux0000 [1])
  );
  X_FF #(
    .LOC ( "SLICE_X18Y26" ),
    .INIT ( 1'b0 ))
  \fsm/address_o_2_1  (
    .I(\fsm/address_o_2_1/DXMUX_2753 ),
    .CE(VCC),
    .CLK(\fsm/address_o_2_1/CLKINV_2736 ),
    .SET(GND),
    .RST(GND),
    .O(\fsm/address_o_2_1_950 )
  );
  X_LUT4 #(
    .INIT ( 16'h4440 ),
    .LOC ( "SLICE_X16Y27" ))
  \fsm/address_o_mux0000<0>21  (
    .ADR0(\fsm/state_cmp_eq0013 ),
    .ADR1(\divider/hz_enable_clk_o_953 ),
    .ADR2(\fsm/state [4]),
    .ADR3(\fsm/state [2]),
    .O(N9_pack_2)
  );
  X_LUT4 #(
    .INIT ( 16'hE6A0 ),
    .LOC ( "SLICE_X16Y27" ))
  \fsm/address_o_mux0000<2>1  (
    .ADR0(\fsm/address_o [1]),
    .ADR1(\fsm/address_o [0]),
    .ADR2(N4),
    .ADR3(N9),
    .O(\fsm/address_o_mux0000 [2])
  );
  X_FF #(
    .LOC ( "SLICE_X16Y27" ),
    .INIT ( 1'b0 ))
  \fsm/address_o_1  (
    .I(\fsm/address_o<1>/DXMUX_2783 ),
    .CE(VCC),
    .CLK(\fsm/address_o<1>/CLKINV_2768 ),
    .SET(GND),
    .RST(GND),
    .O(\fsm/address_o [1])
  );
  X_LUT4 #(
    .INIT ( 16'hFBFB ),
    .LOC ( "SLICE_X14Y26" ))
  \fsm/state_mux0000<3>18  (
    .ADR0(\fsm/state [0]),
    .ADR1(\conterWR/time_ended_o_964 ),
    .ADR2(N24_0),
    .ADR3(VCC),
    .O(\fsm/state_mux0000<3>18/O_pack_1 )
  );
  X_LUT4 #(
    .INIT ( 16'hF888 ),
    .LOC ( "SLICE_X14Y26" ))
  \fsm/state_mux0000<3>30  (
    .ADR0(\divider/hz_enable_clk_o_953 ),
    .ADR1(\fsm/state_mux0000<3>7_0 ),
    .ADR2(\fsm/state_mux0000<3>21_0 ),
    .ADR3(\fsm/state_mux0000<3>18/O ),
    .O(\fsm/state_mux0000[3] )
  );
  X_FF #(
    .LOC ( "SLICE_X14Y26" ),
    .INIT ( 1'b0 ))
  \fsm/state_3  (
    .I(\fsm/state<3>/DXMUX_2813 ),
    .CE(VCC),
    .CLK(\fsm/state<3>/CLKINV_2797 ),
    .SET(GND),
    .RST(GND),
    .O(\fsm/state [3])
  );
  X_LUT4 #(
    .INIT ( 16'hFA72 ),
    .LOC ( "SLICE_X19Y27" ))
  \fsm/address_o_mux0000<0>1  (
    .ADR0(\fsm/state [4]),
    .ADR1(\divider/hz_enable_clk_o_953 ),
    .ADR2(N18_0),
    .ADR3(\fsm/state_cmp_eq0013 ),
    .O(N4_pack_2)
  );
  X_LUT4 #(
    .INIT ( 16'hEE44 ),
    .LOC ( "SLICE_X19Y27" ))
  \fsm/address_o_mux0000<3>1  (
    .ADR0(\fsm/address_o [0]),
    .ADR1(N9),
    .ADR2(VCC),
    .ADR3(N4),
    .O(\fsm/address_o_mux0000 [3])
  );
  X_FF #(
    .LOC ( "SLICE_X19Y27" ),
    .INIT ( 1'b0 ))
  \fsm/address_o_0  (
    .I(\fsm/address_o<0>/DXMUX_2843 ),
    .CE(VCC),
    .CLK(\fsm/address_o<0>/CLKINV_2827 ),
    .SET(GND),
    .RST(GND),
    .O(\fsm/address_o [0])
  );
  X_LUT4 #(
    .INIT ( 16'h8000 ),
    .LOC ( "SLICE_X17Y27" ))
  \fsm/state_cmp_eq00131  (
    .ADR0(\fsm/address_o [1]),
    .ADR1(\fsm/address_o [2]),
    .ADR2(\fsm/address_o [3]),
    .ADR3(\fsm/address_o [0]),
    .O(\fsm/state_cmp_eq0013_pack_1 )
  );
  X_LUT4 #(
    .INIT ( 16'hF2F0 ),
    .LOC ( "SLICE_X17Y27" ))
  \fsm/state_mux0000<5>10  (
    .ADR0(\fsm/state [2]),
    .ADR1(\fsm/state_cmp_eq0013 ),
    .ADR2(\fsm/state_mux0000<5>2_0 ),
    .ADR3(\divider/hz_enable_clk_o_953 ),
    .O(\fsm/state_mux0000<5>10_2868 )
  );
  X_LUT4 #(
    .INIT ( 16'h0400 ),
    .LOC ( "SLICE_X17Y29" ))
  \fsm/state_mux0000<2>2144  (
    .ADR0(\fsm/data_to_write [3]),
    .ADR1(N63_0),
    .ADR2(\fsm/data_to_write [2]),
    .ADR3(N26_0),
    .O(\fsm/state_mux0000<2>2144/O_pack_1 )
  );
  X_LUT4 #(
    .INIT ( 16'hF888 ),
    .LOC ( "SLICE_X17Y29" ))
  \fsm/state_mux0000<2>2169  (
    .ADR0(\fsm/state_mux0000<2>226_0 ),
    .ADR1(\fsm/state_mux0000<2>259 ),
    .ADR2(\fsm/state_mux0000<2>2107_0 ),
    .ADR3(\fsm/state_mux0000<2>2144/O ),
    .O(N7)
  );
  X_LUT4 #(
    .INIT ( 16'hFFBA ),
    .LOC ( "SLICE_X12Y28" ))
  \fsm/output_enable_o_mux00001  (
    .ADR0(\fsm/state [0]),
    .ADR1(\fsm/state [3]),
    .ADR2(\fsm/output_enable_o_932 ),
    .ADR3(\fsm/state [4]),
    .O(\fsm/output_enable_o_mux00001_2913 )
  );
  X_SFF #(
    .LOC ( "SLICE_X12Y28" ),
    .INIT ( 1'b1 ))
  \fsm/output_enable_o  (
    .I(\fsm/read_o/DYMUX_2916 ),
    .CE(VCC),
    .CLK(\fsm/read_o/CLKINV_2907 ),
    .SET(GND),
    .RST(GND),
    .SSET(\fsm/read_o/SRINV_2908 ),
    .SRST(GND),
    .O(\fsm/output_enable_o_932 )
  );
  X_LUT4 #(
    .INIT ( 16'hFFF2 ),
    .LOC ( "SLICE_X12Y28" ))
  \fsm/read_o_mux00001  (
    .ADR0(\fsm/read_o_1044 ),
    .ADR1(\fsm/state [3]),
    .ADR2(\fsm/state [0]),
    .ADR3(\fsm/state [5]),
    .O(\fsm/read_o_mux00001_2925 )
  );
  X_SFF #(
    .LOC ( "SLICE_X12Y28" ),
    .INIT ( 1'b1 ))
  \fsm/read_o  (
    .I(\fsm/read_o/DXMUX_2928 ),
    .CE(VCC),
    .CLK(\fsm/read_o/CLKINV_2907 ),
    .SET(GND),
    .RST(GND),
    .SSET(\fsm/read_o/SRINV_2908 ),
    .SRST(GND),
    .O(\fsm/read_o_1044 )
  );
  X_LUT4 #(
    .INIT ( 16'h0055 ),
    .LOC ( "SLICE_X15Y30" ))
  \conterWR/Mcount_counter_xor<0>11  (
    .ADR0(\conterWR/counter [1]),
    .ADR1(VCC),
    .ADR2(VCC),
    .ADR3(\conterWR/counter [0]),
    .O(\conterWR/Mcount_counter )
  );
  X_FF #(
    .LOC ( "SLICE_X15Y30" ),
    .INIT ( 1'b0 ))
  \conterWR/counter_0  (
    .I(\conterWR/counter<1>/DYMUX_2954 ),
    .CE(\conterWR/counter<1>/CEINV_2942 ),
    .CLK(\conterWR/counter<1>/CLKINV_2943 ),
    .SET(GND),
    .RST(\conterWR/counter<1>/SRINV_2944 ),
    .O(\conterWR/counter [0])
  );
  X_LUT4 #(
    .INIT ( 16'h5500 ),
    .LOC ( "SLICE_X15Y30" ))
  \conterWR/Mcount_counter_xor<1>11  (
    .ADR0(\conterWR/counter [1]),
    .ADR1(VCC),
    .ADR2(VCC),
    .ADR3(\conterWR/counter [0]),
    .O(\conterWR/Mcount_counter1 )
  );
  X_FF #(
    .LOC ( "SLICE_X15Y30" ),
    .INIT ( 1'b0 ))
  \conterWR/counter_1  (
    .I(\conterWR/counter<1>/DXMUX_2971 ),
    .CE(\conterWR/counter<1>/CEINV_2942 ),
    .CLK(\conterWR/counter<1>/CLKINV_2943 ),
    .SET(GND),
    .RST(\conterWR/counter<1>/SRINV_2944 ),
    .O(\conterWR/counter [1])
  );
  X_LUT4 #(
    .INIT ( 16'h00CC ),
    .LOC ( "SLICE_X11Y21" ))
  \divider/Mcount_counter_eqn_101  (
    .ADR0(VCC),
    .ADR1(Result[10]),
    .ADR2(VCC),
    .ADR3(\divider/counter_cmp_eq0000 ),
    .O(\divider/Mcount_counter_eqn_10 )
  );
  X_FF #(
    .LOC ( "SLICE_X11Y21" ),
    .INIT ( 1'b0 ))
  \divider/counter_10  (
    .I(\divider/counter<11>/DYMUX_3000 ),
    .CE(\divider/counter<11>/CEINVNOT ),
    .CLK(\divider/counter<11>/CLKINV_2989 ),
    .SET(GND),
    .RST(\divider/counter<11>/SRINV_2990 ),
    .O(\divider/counter [10])
  );
  X_LUT4 #(
    .INIT ( 16'h3300 ),
    .LOC ( "SLICE_X11Y21" ))
  \divider/Mcount_counter_eqn_111  (
    .ADR0(VCC),
    .ADR1(\divider/counter_cmp_eq0000 ),
    .ADR2(VCC),
    .ADR3(Result[11]),
    .O(\divider/Mcount_counter_eqn_11 )
  );
  X_FF #(
    .LOC ( "SLICE_X11Y21" ),
    .INIT ( 1'b0 ))
  \divider/counter_11  (
    .I(\divider/counter<11>/DXMUX_3017 ),
    .CE(\divider/counter<11>/CEINVNOT ),
    .CLK(\divider/counter<11>/CLKINV_2989 ),
    .SET(GND),
    .RST(\divider/counter<11>/SRINV_2990 ),
    .O(\divider/counter [11])
  );
  X_LUT4 #(
    .INIT ( 16'h3C00 ),
    .LOC ( "SLICE_X14Y30" ))
  \fsm/segment1_o_mux0000<1>1  (
    .ADR0(VCC),
    .ADR1(\fsm/segment1_o_cmp_gt0000_0 ),
    .ADR2(N53),
    .ADR3(N11),
    .O(\fsm/segment1_o_mux0000<1>1_3038 )
  );
  X_SFF #(
    .LOC ( "SLICE_X14Y30" ),
    .INIT ( 1'b1 ))
  \fsm/segment1_o_1  (
    .I(\fsm/segment1_o<1>/DYMUX_3041 ),
    .CE(VCC),
    .CLK(\fsm/segment1_o<1>/CLKINV_3031 ),
    .SET(GND),
    .RST(GND),
    .SSET(\fsm/segment1_o<1>/SRINV_3032 ),
    .SRST(GND),
    .O(\fsm/segment1_o [1])
  );
  X_LUT4 #(
    .INIT ( 16'hEAC0 ),
    .LOC ( "SLICE_X18Y29" ))
  \fsm/segment1_o_mux0000<2>  (
    .ADR0(N65_0),
    .ADR1(\fsm/segment1_o [2]),
    .ADR2(N5_0),
    .ADR3(N11),
    .O(\fsm/segment1_o_mux0000 [2])
  );
  X_FF #(
    .LOC ( "SLICE_X18Y29" ),
    .INIT ( 1'b0 ))
  \fsm/segment1_o_2  (
    .I(\fsm/segment1_o<2>/DYMUX_3060 ),
    .CE(VCC),
    .CLK(\fsm/segment1_o<2>/CLKINV_3052 ),
    .SET(GND),
    .RST(GND),
    .O(\fsm/segment1_o [2])
  );
  X_LUT4 #(
    .INIT ( 16'h00F0 ),
    .LOC ( "SLICE_X12Y26" ))
  \divider/Mcount_counter_eqn_201  (
    .ADR0(VCC),
    .ADR1(VCC),
    .ADR2(Result[20]),
    .ADR3(\divider/counter_cmp_eq0000 ),
    .O(\divider/Mcount_counter_eqn_20 )
  );
  X_FF #(
    .LOC ( "SLICE_X12Y26" ),
    .INIT ( 1'b0 ))
  \divider/counter_20  (
    .I(\divider/counter<21>/DYMUX_3085 ),
    .CE(\divider/counter<21>/CEINVNOT ),
    .CLK(\divider/counter<21>/CLKINV_3074 ),
    .SET(GND),
    .RST(\divider/counter<21>/SRINV_3075 ),
    .O(\divider/counter [20])
  );
  X_LUT4 #(
    .INIT ( 16'h00CC ),
    .LOC ( "SLICE_X12Y26" ))
  \divider/Mcount_counter_eqn_211  (
    .ADR0(VCC),
    .ADR1(Result[21]),
    .ADR2(VCC),
    .ADR3(\divider/counter_cmp_eq0000 ),
    .O(\divider/Mcount_counter_eqn_21 )
  );
  X_FF #(
    .LOC ( "SLICE_X12Y26" ),
    .INIT ( 1'b0 ))
  \divider/counter_21  (
    .I(\divider/counter<21>/DXMUX_3102 ),
    .CE(\divider/counter<21>/CEINVNOT ),
    .CLK(\divider/counter<21>/CLKINV_3074 ),
    .SET(GND),
    .RST(\divider/counter<21>/SRINV_3075 ),
    .O(\divider/counter [21])
  );
  X_LUT4 #(
    .INIT ( 16'h0F00 ),
    .LOC ( "SLICE_X10Y22" ))
  \divider/Mcount_counter_eqn_121  (
    .ADR0(VCC),
    .ADR1(VCC),
    .ADR2(\divider/counter_cmp_eq0000 ),
    .ADR3(Result[12]),
    .O(\divider/Mcount_counter_eqn_12 )
  );
  X_FF #(
    .LOC ( "SLICE_X10Y22" ),
    .INIT ( 1'b0 ))
  \divider/counter_12  (
    .I(\divider/counter<13>/DYMUX_3131 ),
    .CE(\divider/counter<13>/CEINVNOT ),
    .CLK(\divider/counter<13>/CLKINV_3120 ),
    .SET(GND),
    .RST(\divider/counter<13>/SRINV_3121 ),
    .O(\divider/counter [12])
  );
  X_LUT4 #(
    .INIT ( 16'h0C0C ),
    .LOC ( "SLICE_X10Y22" ))
  \divider/Mcount_counter_eqn_131  (
    .ADR0(VCC),
    .ADR1(Result[13]),
    .ADR2(\divider/counter_cmp_eq0000 ),
    .ADR3(VCC),
    .O(\divider/Mcount_counter_eqn_13 )
  );
  X_FF #(
    .LOC ( "SLICE_X10Y22" ),
    .INIT ( 1'b0 ))
  \divider/counter_13  (
    .I(\divider/counter<13>/DXMUX_3148 ),
    .CE(\divider/counter<13>/CEINVNOT ),
    .CLK(\divider/counter<13>/CLKINV_3120 ),
    .SET(GND),
    .RST(\divider/counter<13>/SRINV_3121 ),
    .O(\divider/counter [13])
  );
  X_LUT4 #(
    .INIT ( 16'h5500 ),
    .LOC ( "SLICE_X12Y27" ))
  \divider/Mcount_counter_eqn_221  (
    .ADR0(\divider/counter_cmp_eq0000 ),
    .ADR1(VCC),
    .ADR2(VCC),
    .ADR3(Result[22]),
    .O(\divider/Mcount_counter_eqn_22 )
  );
  X_LUT4 #(
    .INIT ( 16'hFF00 ),
    .LOC ( "SLICE_X13Y16" ))
  \Result<0>/G/X_LUT4  (
    .ADR0(VCC),
    .ADR1(VCC),
    .ADR2(VCC),
    .ADR3(\divider/counter [1]),
    .O(\Result<0>/G )
  );
  X_LUT4 #(
    .INIT ( 16'hF0F0 ),
    .LOC ( "SLICE_X13Y17" ))
  \Result<2>/F/X_LUT4  (
    .ADR0(VCC),
    .ADR1(VCC),
    .ADR2(\divider/counter [2]),
    .ADR3(VCC),
    .O(\Result<2>/F )
  );
  X_LUT4 #(
    .INIT ( 16'hFF00 ),
    .LOC ( "SLICE_X13Y17" ))
  \Result<2>/G/X_LUT4  (
    .ADR0(VCC),
    .ADR1(VCC),
    .ADR2(VCC),
    .ADR3(\divider/counter [3]),
    .O(\Result<2>/G )
  );
  X_LUT4 #(
    .INIT ( 16'hF0F0 ),
    .LOC ( "SLICE_X13Y18" ))
  \Result<4>/F/X_LUT4  (
    .ADR0(VCC),
    .ADR1(VCC),
    .ADR2(\divider/counter [4]),
    .ADR3(VCC),
    .O(\Result<4>/F )
  );
  X_LUT4 #(
    .INIT ( 16'hFF00 ),
    .LOC ( "SLICE_X13Y18" ))
  \Result<4>/G/X_LUT4  (
    .ADR0(VCC),
    .ADR1(VCC),
    .ADR2(VCC),
    .ADR3(\divider/counter [5]),
    .O(\Result<4>/G )
  );
  X_LUT4 #(
    .INIT ( 16'hF0F0 ),
    .LOC ( "SLICE_X13Y19" ))
  \Result<6>/F/X_LUT4  (
    .ADR0(VCC),
    .ADR1(VCC),
    .ADR2(\divider/counter [6]),
    .ADR3(VCC),
    .O(\Result<6>/F )
  );
  X_LUT4 #(
    .INIT ( 16'hFF00 ),
    .LOC ( "SLICE_X13Y19" ))
  \Result<6>/G/X_LUT4  (
    .ADR0(VCC),
    .ADR1(VCC),
    .ADR2(VCC),
    .ADR3(\divider/counter [7]),
    .O(\Result<6>/G )
  );
  X_LUT4 #(
    .INIT ( 16'hAAAA ),
    .LOC ( "SLICE_X13Y20" ))
  \Result<8>/F/X_LUT4  (
    .ADR0(\divider/counter [8]),
    .ADR1(VCC),
    .ADR2(VCC),
    .ADR3(VCC),
    .O(\Result<8>/F )
  );
  X_LUT4 #(
    .INIT ( 16'hFF00 ),
    .LOC ( "SLICE_X13Y20" ))
  \Result<8>/G/X_LUT4  (
    .ADR0(VCC),
    .ADR1(VCC),
    .ADR2(VCC),
    .ADR3(\divider/counter [9]),
    .O(\Result<8>/G )
  );
  X_LUT4 #(
    .INIT ( 16'hCCCC ),
    .LOC ( "SLICE_X13Y21" ))
  \Result<10>/F/X_LUT4  (
    .ADR0(VCC),
    .ADR1(\divider/counter [10]),
    .ADR2(VCC),
    .ADR3(VCC),
    .O(\Result<10>/F )
  );
  X_LUT4 #(
    .INIT ( 16'hF0F0 ),
    .LOC ( "SLICE_X13Y21" ))
  \Result<10>/G/X_LUT4  (
    .ADR0(VCC),
    .ADR1(VCC),
    .ADR2(\divider/counter [11]),
    .ADR3(VCC),
    .O(\Result<10>/G )
  );
  X_LUT4 #(
    .INIT ( 16'hCCCC ),
    .LOC ( "SLICE_X13Y22" ))
  \Result<12>/F/X_LUT4  (
    .ADR0(VCC),
    .ADR1(\divider/counter [12]),
    .ADR2(VCC),
    .ADR3(VCC),
    .O(\Result<12>/F )
  );
  X_LUT4 #(
    .INIT ( 16'hAAAA ),
    .LOC ( "SLICE_X13Y22" ))
  \Result<12>/G/X_LUT4  (
    .ADR0(\divider/counter [13]),
    .ADR1(VCC),
    .ADR2(VCC),
    .ADR3(VCC),
    .O(\Result<12>/G )
  );
  X_LUT4 #(
    .INIT ( 16'hAAAA ),
    .LOC ( "SLICE_X13Y23" ))
  \Result<14>/F/X_LUT4  (
    .ADR0(\divider/counter [14]),
    .ADR1(VCC),
    .ADR2(VCC),
    .ADR3(VCC),
    .O(\Result<14>/F )
  );
  X_LUT4 #(
    .INIT ( 16'hFF00 ),
    .LOC ( "SLICE_X13Y23" ))
  \Result<14>/G/X_LUT4  (
    .ADR0(VCC),
    .ADR1(VCC),
    .ADR2(VCC),
    .ADR3(\divider/counter [15]),
    .O(\Result<14>/G )
  );
  X_LUT4 #(
    .INIT ( 16'hAAAA ),
    .LOC ( "SLICE_X13Y24" ))
  \Result<16>/F/X_LUT4  (
    .ADR0(\divider/counter [16]),
    .ADR1(VCC),
    .ADR2(VCC),
    .ADR3(VCC),
    .O(\Result<16>/F )
  );
  X_LUT4 #(
    .INIT ( 16'hFF00 ),
    .LOC ( "SLICE_X13Y24" ))
  \Result<16>/G/X_LUT4  (
    .ADR0(VCC),
    .ADR1(VCC),
    .ADR2(VCC),
    .ADR3(\divider/counter [17]),
    .O(\Result<16>/G )
  );
  X_LUT4 #(
    .INIT ( 16'hCCCC ),
    .LOC ( "SLICE_X13Y25" ))
  \Result<18>/F/X_LUT4  (
    .ADR0(VCC),
    .ADR1(\divider/counter [18]),
    .ADR2(VCC),
    .ADR3(VCC),
    .O(\Result<18>/F )
  );
  X_LUT4 #(
    .INIT ( 16'hF0F0 ),
    .LOC ( "SLICE_X13Y25" ))
  \Result<18>/G/X_LUT4  (
    .ADR0(VCC),
    .ADR1(VCC),
    .ADR2(\divider/counter [19]),
    .ADR3(VCC),
    .O(\Result<18>/G )
  );
  X_LUT4 #(
    .INIT ( 16'hF0F0 ),
    .LOC ( "SLICE_X13Y26" ))
  \Result<20>/F/X_LUT4  (
    .ADR0(VCC),
    .ADR1(VCC),
    .ADR2(\divider/counter [20]),
    .ADR3(VCC),
    .O(\Result<20>/F )
  );
  X_LUT4 #(
    .INIT ( 16'hFF00 ),
    .LOC ( "SLICE_X13Y26" ))
  \Result<20>/G/X_LUT4  (
    .ADR0(VCC),
    .ADR1(VCC),
    .ADR2(VCC),
    .ADR3(\divider/counter [21]),
    .O(\Result<20>/G )
  );
  X_LUT4 #(
    .INIT ( 16'hCCCC ),
    .LOC ( "SLICE_X13Y27" ))
  \Result<22>/F/X_LUT4  (
    .ADR0(VCC),
    .ADR1(\divider/counter [22]),
    .ADR2(VCC),
    .ADR3(VCC),
    .O(\Result<22>/F )
  );
  X_BUF #(
    .LOC ( "PAD17" ))
  \segment2_o/OUTPUT/OFF/OMUX  (
    .I(\fsm/segment2_o_1040 ),
    .O(\segment2_o/O )
  );
  X_BUF #(
    .LOC ( "PAD18" ))
  \write_o/OUTPUT/OFF/OMUX  (
    .I(\fsm/write_o_1041 ),
    .O(\write_o/O )
  );
  X_BUF #(
    .LOC ( "PAD9" ))
  \write_enable_o/OUTPUT/OFF/OMUX  (
    .I(\fsm/write_enable_o_931 ),
    .O(\write_enable_o/O )
  );
  X_BUF #(
    .LOC ( "PAD32" ))
  \address_o<0>/OUTPUT/OFF/OMUX  (
    .I(\fsm/address_o [0]),
    .O(\address_o<0>/O )
  );
  X_BUF #(
    .LOC ( "PAD33" ))
  \data_io<0>/OUTPUT/TFF/TMUX  (
    .I(N10_0),
    .O(\data_io<0>/T )
  );
  X_BUF #(
    .LOC ( "PAD33" ))
  \data_io<0>/OUTPUT/OFF/OMUX  (
    .I(\data_io<0>_MLTSRCEDGE/F5MUX_2448 ),
    .O(\data_io<0>/O )
  );
  X_BUF #(
    .LOC ( "PAD15" ))
  \read_o/OUTPUT/OFF/OMUX  (
    .I(\fsm/read_o_1044 ),
    .O(\read_o/O )
  );
  X_BUF #(
    .LOC ( "PAD12" ))
  \address_o<1>/OUTPUT/OFF/OMUX  (
    .I(\fsm/address_o [1]),
    .O(\address_o<1>/O )
  );
  X_BUF #(
    .LOC ( "PAD34" ))
  \data_io<1>/OUTPUT/TFF/TMUX  (
    .I(N10_0),
    .O(\data_io<1>/T )
  );
  X_BUF #(
    .LOC ( "PAD34" ))
  \data_io<1>/OUTPUT/OFF/OMUX  (
    .I(\data_io<1>_MLTSRCEDGE/F5MUX_2473 ),
    .O(\data_io<1>/O )
  );
  X_BUF #(
    .LOC ( "PAD30" ))
  \address_o<2>/OUTPUT/OFF/OMUX  (
    .I(\fsm/address_o [2]),
    .O(\address_o<2>/O )
  );
  X_BUF #(
    .LOC ( "PAD26" ))
  \data_io<2>/OUTPUT/TFF/TMUX  (
    .I(N10_0),
    .O(\data_io<2>/T )
  );
  X_BUF #(
    .LOC ( "PAD26" ))
  \data_io<2>/OUTPUT/OFF/OMUX  (
    .I(\data_io<2>_MLTSRCEDGE/F5MUX_2498 ),
    .O(\data_io<2>/O )
  );
  X_BUF #(
    .LOC ( "PAD31" ))
  \address_o<3>/OUTPUT/OFF/OMUX  (
    .I(\fsm/address_o [3]),
    .O(\address_o<3>/O )
  );
  X_BUF #(
    .LOC ( "PAD23" ))
  \data_io<3>/OUTPUT/TFF/TMUX  (
    .I(N10_0),
    .O(\data_io<3>/T )
  );
  X_BUF #(
    .LOC ( "PAD23" ))
  \data_io<3>/OUTPUT/OFF/OMUX  (
    .I(\data_io<3>_MLTSRCEDGE/F5MUX_2523 ),
    .O(\data_io<3>/O )
  );
  X_BUF #(
    .LOC ( "PAD22" ))
  \segment1_o<0>/OUTPUT/OFF/OMUX  (
    .I(\fsm/segment1_o [0]),
    .O(\segment1_o<0>/O )
  );
  X_BUF #(
    .LOC ( "PAD24" ))
  \data_io<4>/OUTPUT/TFF/TMUX  (
    .I(N10_0),
    .O(\data_io<4>/T )
  );
  X_BUF #(
    .LOC ( "PAD24" ))
  \data_io<4>/OUTPUT/OFF/OMUX  (
    .I(\data_io<4>_MLTSRCEDGE ),
    .O(\data_io<4>/O )
  );
  X_BUF #(
    .LOC ( "PAD20" ))
  \segment1_o<1>/OUTPUT/OFF/OMUX  (
    .I(\fsm/segment1_o [1]),
    .O(\segment1_o<1>/O )
  );
  X_BUF #(
    .LOC ( "PAD10" ))
  \output_enable_o/OUTPUT/OFF/OMUX  (
    .I(\fsm/output_enable_o_932 ),
    .O(\output_enable_o/O )
  );
  X_BUF #(
    .LOC ( "PAD25" ))
  \data_io<5>/OUTPUT/TFF/TMUX  (
    .I(N10_0),
    .O(\data_io<5>/T )
  );
  X_BUF #(
    .LOC ( "PAD25" ))
  \data_io<5>/OUTPUT/OFF/OMUX  (
    .I(\data_io<5>_MLTSRCEDGE ),
    .O(\data_io<5>/O )
  );
  X_BUF #(
    .LOC ( "PAD21" ))
  \segment1_o<2>/OUTPUT/OFF/OMUX  (
    .I(\fsm/segment1_o [2]),
    .O(\segment1_o<2>/O )
  );
  X_BUF #(
    .LOC ( "PAD27" ))
  \data_io<6>/OUTPUT/TFF/TMUX  (
    .I(N10_0),
    .O(\data_io<6>/T )
  );
  X_BUF #(
    .LOC ( "PAD27" ))
  \data_io<6>/OUTPUT/OFF/OMUX  (
    .I(\data_io<6>_MLTSRCEDGE ),
    .O(\data_io<6>/O )
  );
  X_BUF #(
    .LOC ( "PAD19" ))
  \segment1_o<3>/OUTPUT/OFF/OMUX  (
    .I(\fsm/segment1_o [3]),
    .O(\segment1_o<3>/O )
  );
  X_BUF #(
    .LOC ( "PAD28" ))
  \data_io<7>/OUTPUT/TFF/TMUX  (
    .I(N10_0),
    .O(\data_io<7>/T )
  );
  X_BUF #(
    .LOC ( "PAD28" ))
  \data_io<7>/OUTPUT/OFF/OMUX  (
    .I(\data_io<7>_MLTSRCEDGE ),
    .O(\data_io<7>/O )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory4/RADR1  (
    .I(\fsm/address_o [0]),
    .O(\NlwBufferSignal_memory/Mram_memory4/RADR1 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory4/RADR2  (
    .I(\fsm/address_o [1]),
    .O(\NlwBufferSignal_memory/Mram_memory4/RADR2 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory4/RADR3  (
    .I(\fsm/address_o [2]),
    .O(\NlwBufferSignal_memory/Mram_memory4/RADR3 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory4/RADR4  (
    .I(\fsm/address_o [3]),
    .O(\NlwBufferSignal_memory/Mram_memory4/RADR4 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory4/WADR1  (
    .I(\fsm/address_o [0]),
    .O(\NlwBufferSignal_memory/Mram_memory4/WADR1 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory4/WADR2  (
    .I(\fsm/address_o [1]),
    .O(\NlwBufferSignal_memory/Mram_memory4/WADR2 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory4/WADR3  (
    .I(\fsm/address_o [2]),
    .O(\NlwBufferSignal_memory/Mram_memory4/WADR3 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory4/WADR4  (
    .I(\fsm/address_o [3]),
    .O(\NlwBufferSignal_memory/Mram_memory4/WADR4 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory5/RADR1  (
    .I(\fsm/address_o [0]),
    .O(\NlwBufferSignal_memory/Mram_memory5/RADR1 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory5/RADR2  (
    .I(\fsm/address_o [1]),
    .O(\NlwBufferSignal_memory/Mram_memory5/RADR2 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory5/RADR3  (
    .I(\fsm/address_o [2]),
    .O(\NlwBufferSignal_memory/Mram_memory5/RADR3 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory5/RADR4  (
    .I(\fsm/address_o [3]),
    .O(\NlwBufferSignal_memory/Mram_memory5/RADR4 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory5/WADR1  (
    .I(\fsm/address_o [0]),
    .O(\NlwBufferSignal_memory/Mram_memory5/WADR1 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory5/WADR2  (
    .I(\fsm/address_o [1]),
    .O(\NlwBufferSignal_memory/Mram_memory5/WADR2 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory5/WADR3  (
    .I(\fsm/address_o [2]),
    .O(\NlwBufferSignal_memory/Mram_memory5/WADR3 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory5/WADR4  (
    .I(\fsm/address_o [3]),
    .O(\NlwBufferSignal_memory/Mram_memory5/WADR4 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory6/RADR1  (
    .I(\fsm/address_o [0]),
    .O(\NlwBufferSignal_memory/Mram_memory6/RADR1 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory6/RADR2  (
    .I(\fsm/address_o [1]),
    .O(\NlwBufferSignal_memory/Mram_memory6/RADR2 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory6/RADR4  (
    .I(\fsm/address_o [3]),
    .O(\NlwBufferSignal_memory/Mram_memory6/RADR4 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory6/WADR1  (
    .I(\fsm/address_o [0]),
    .O(\NlwBufferSignal_memory/Mram_memory6/WADR1 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory6/WADR2  (
    .I(\fsm/address_o [1]),
    .O(\NlwBufferSignal_memory/Mram_memory6/WADR2 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory6/WADR4  (
    .I(\fsm/address_o [3]),
    .O(\NlwBufferSignal_memory/Mram_memory6/WADR4 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory1/RADR1  (
    .I(\fsm/address_o [0]),
    .O(\NlwBufferSignal_memory/Mram_memory1/RADR1 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory1/RADR2  (
    .I(\fsm/address_o [1]),
    .O(\NlwBufferSignal_memory/Mram_memory1/RADR2 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory1/RADR4  (
    .I(\fsm/address_o [3]),
    .O(\NlwBufferSignal_memory/Mram_memory1/RADR4 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory1/WADR1  (
    .I(\fsm/address_o [0]),
    .O(\NlwBufferSignal_memory/Mram_memory1/WADR1 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory1/WADR2  (
    .I(\fsm/address_o [1]),
    .O(\NlwBufferSignal_memory/Mram_memory1/WADR2 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory1/WADR4  (
    .I(\fsm/address_o [3]),
    .O(\NlwBufferSignal_memory/Mram_memory1/WADR4 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory7/RADR1  (
    .I(\fsm/address_o [0]),
    .O(\NlwBufferSignal_memory/Mram_memory7/RADR1 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory7/RADR2  (
    .I(\fsm/address_o [1]),
    .O(\NlwBufferSignal_memory/Mram_memory7/RADR2 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory7/RADR3  (
    .I(\fsm/address_o [2]),
    .O(\NlwBufferSignal_memory/Mram_memory7/RADR3 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory7/RADR4  (
    .I(\fsm/address_o [3]),
    .O(\NlwBufferSignal_memory/Mram_memory7/RADR4 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory7/WADR1  (
    .I(\fsm/address_o [0]),
    .O(\NlwBufferSignal_memory/Mram_memory7/WADR1 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory7/WADR2  (
    .I(\fsm/address_o [1]),
    .O(\NlwBufferSignal_memory/Mram_memory7/WADR2 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory7/WADR3  (
    .I(\fsm/address_o [2]),
    .O(\NlwBufferSignal_memory/Mram_memory7/WADR3 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory7/WADR4  (
    .I(\fsm/address_o [3]),
    .O(\NlwBufferSignal_memory/Mram_memory7/WADR4 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory2/RADR1  (
    .I(\fsm/address_o [0]),
    .O(\NlwBufferSignal_memory/Mram_memory2/RADR1 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory2/RADR2  (
    .I(\fsm/address_o [1]),
    .O(\NlwBufferSignal_memory/Mram_memory2/RADR2 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory2/RADR3  (
    .I(\fsm/address_o [2]),
    .O(\NlwBufferSignal_memory/Mram_memory2/RADR3 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory2/RADR4  (
    .I(\fsm/address_o [3]),
    .O(\NlwBufferSignal_memory/Mram_memory2/RADR4 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory2/WADR1  (
    .I(\fsm/address_o [0]),
    .O(\NlwBufferSignal_memory/Mram_memory2/WADR1 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory2/WADR2  (
    .I(\fsm/address_o [1]),
    .O(\NlwBufferSignal_memory/Mram_memory2/WADR2 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory2/WADR3  (
    .I(\fsm/address_o [2]),
    .O(\NlwBufferSignal_memory/Mram_memory2/WADR3 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory2/WADR4  (
    .I(\fsm/address_o [3]),
    .O(\NlwBufferSignal_memory/Mram_memory2/WADR4 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory8/RADR1  (
    .I(\fsm/address_o [0]),
    .O(\NlwBufferSignal_memory/Mram_memory8/RADR1 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory8/RADR2  (
    .I(\fsm/address_o [1]),
    .O(\NlwBufferSignal_memory/Mram_memory8/RADR2 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory8/RADR3  (
    .I(\fsm/address_o [2]),
    .O(\NlwBufferSignal_memory/Mram_memory8/RADR3 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory8/RADR4  (
    .I(\fsm/address_o [3]),
    .O(\NlwBufferSignal_memory/Mram_memory8/RADR4 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory8/WADR1  (
    .I(\fsm/address_o [0]),
    .O(\NlwBufferSignal_memory/Mram_memory8/WADR1 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory8/WADR2  (
    .I(\fsm/address_o [1]),
    .O(\NlwBufferSignal_memory/Mram_memory8/WADR2 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory8/WADR3  (
    .I(\fsm/address_o [2]),
    .O(\NlwBufferSignal_memory/Mram_memory8/WADR3 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory8/WADR4  (
    .I(\fsm/address_o [3]),
    .O(\NlwBufferSignal_memory/Mram_memory8/WADR4 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory3/RADR1  (
    .I(\fsm/address_o [0]),
    .O(\NlwBufferSignal_memory/Mram_memory3/RADR1 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory3/RADR2  (
    .I(\fsm/address_o [1]),
    .O(\NlwBufferSignal_memory/Mram_memory3/RADR2 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory3/RADR3  (
    .I(\fsm/address_o [2]),
    .O(\NlwBufferSignal_memory/Mram_memory3/RADR3 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory3/RADR4  (
    .I(\fsm/address_o [3]),
    .O(\NlwBufferSignal_memory/Mram_memory3/RADR4 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory3/WADR1  (
    .I(\fsm/address_o [0]),
    .O(\NlwBufferSignal_memory/Mram_memory3/WADR1 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory3/WADR2  (
    .I(\fsm/address_o [1]),
    .O(\NlwBufferSignal_memory/Mram_memory3/WADR2 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory3/WADR3  (
    .I(\fsm/address_o [2]),
    .O(\NlwBufferSignal_memory/Mram_memory3/WADR3 )
  );
  X_BUF   \NlwBufferBlock_memory/Mram_memory3/WADR4  (
    .I(\fsm/address_o [3]),
    .O(\NlwBufferSignal_memory/Mram_memory3/WADR4 )
  );
  X_ZERO   NlwBlock_MemorySampleTest_GND (
    .O(GND)
  );
  X_ONE   NlwBlock_MemorySampleTest_VCC (
    .O(VCC)
  );
endmodule


`ifndef GLBL
`define GLBL

`timescale  1 ps / 1 ps

module glbl ();

    parameter ROC_WIDTH = 100000;
    parameter TOC_WIDTH = 0;

//--------   STARTUP Globals --------------
    wire GSR;
    wire GTS;
    wire GWE;
    wire PRLD;
    tri1 p_up_tmp;
    tri (weak1, strong0) PLL_LOCKG = p_up_tmp;

    wire PROGB_GLBL;

    reg GSR_int;
    reg GTS_int;
    reg PRLD_int;

//--------   JTAG Globals --------------
    wire JTAG_TDO_GLBL;
    wire JTAG_TCK_GLBL;
    wire JTAG_TDI_GLBL;
    wire JTAG_TMS_GLBL;
    wire JTAG_TRST_GLBL;

    reg JTAG_CAPTURE_GLBL;
    reg JTAG_RESET_GLBL;
    reg JTAG_SHIFT_GLBL;
    reg JTAG_UPDATE_GLBL;
    reg JTAG_RUNTEST_GLBL;

    reg JTAG_SEL1_GLBL = 0;
    reg JTAG_SEL2_GLBL = 0 ;
    reg JTAG_SEL3_GLBL = 0;
    reg JTAG_SEL4_GLBL = 0;

    reg JTAG_USER_TDO1_GLBL = 1'bz;
    reg JTAG_USER_TDO2_GLBL = 1'bz;
    reg JTAG_USER_TDO3_GLBL = 1'bz;
    reg JTAG_USER_TDO4_GLBL = 1'bz;

    assign (weak1, weak0) GSR = GSR_int;
    assign (weak1, weak0) GTS = GTS_int;
    assign (weak1, weak0) PRLD = PRLD_int;

    initial begin
	GSR_int = 1'b1;
	PRLD_int = 1'b1;
	#(ROC_WIDTH)
	GSR_int = 1'b0;
	PRLD_int = 1'b0;
    end

    initial begin
	GTS_int = 1'b1;
	#(TOC_WIDTH)
	GTS_int = 1'b0;
    end

endmodule

`endif

